SerDes IP Applications Engineering Architect Engineer

Job Title

SerDes IP Applications Engineering Architect Engineer

Role Summary

Lead customer-facing technical engagements to integrate, validate, and bring up Synopsys Interface IP (PCIe and high-speed SerDes) in ASIC/SoC products. Provide hands-on troubleshooting across RTL, synthesis, floorplanning, timing closure, and silicon/system bring-up.

Collaborate with R&D and product teams to relay customer feedback and improve IP; provide documentation, training, and occasional on-site support.

Experience Level

Senior-level - requires 15+ years of industry experience or equivalent.

Responsibilities

Provide technical leadership and direct integration support for key customers throughout the SoC design and bring-up lifecycle.

• Lead integration reviews and troubleshoot complex PCIe and SerDes integration issues across simulation, synthesis, floorplanning, timing, and silicon bring-up.
• Support silicon bring-up and system-level characterization in lab environments.
• Work with customers on PCI architecture definition, RTL simulation, and link implementation/validation.
• Create and maintain best-practice documentation, application notes, and deliver customer training.
• Coordinate feedback to product and R&D teams to influence IP improvements and roadmap.
• Occasional travel to customer sites for on-site support and integration reviews.

Requirements

Must-have technical skills and experience.

• Deep knowledge of PCI Express (PCIe 6/7) specification and practical implementation; hands-on PCIe link definition and validation in SoC environments.
• Extensive experience with IP design and ASIC/SoC integration; strong background in customer-facing engineering roles.
• Solid understanding of ASIC design flows: simulation/verification, RTL synthesis, floorplanning, physical design, and timing closure.
• Hands-on expertise integrating and validating high-speed SerDes IPs (PCIe, USB, SATA).
• Proficient in RTL and gate-level simulation debugging; familiarity with front-end and physical verification tools such as Design Compiler, Fusion Compiler, and PrimeTime.
• Experience with silicon bring-up and system-level characterization in lab environments.
• Excellent communication skills, organized, and able to manage multiple projects and tight schedules.

Education Requirements

Master's degree preferred with 15+ years of industry experience, or equivalent practical experience. Exceptional candidates with a strong academic background will be considered.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.