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SerDes DSP System Sr. Architect

Synopsys
September 16, 2026
Full-time
On-site
Sunnyvale, California, United States
$226,000 - $338,000 USD yearly
Semiconductor IP Jobs, Level - Senior

Job Title

SerDes DSP System Sr. Architect

Role Summary

Senior system architect responsible for modelling, validating, and delivering high-speed SerDes transceiver system IP (PAM4) targeting PCIe and Ethernet standards. The role works across analog, digital, and hardware teams to develop system models, verify performance, and support post-silicon characterization and customer troubleshooting.

Experience Level

Senior - requires substantial experience; the posting specifies 13+ years of relevant experience.

Responsibilities

Primary technical responsibilities and cross-functional activities include:

  • Develop and maintain system-level SerDes models (MATLAB/Simulink) for PAM4 transceivers targeting PCIe (128 Gbps+) and Ethernet (200 Gbps+).
  • Run system simulations and perform sign-off verification across multiple protocols and channel conditions.
  • Design and propose adaptive/calibration algorithms to optimize transceiver performance.
  • Correlate simulation results with silicon measurements and support post-silicon analysis.
  • Provide expert assistance to customers on system-level performance and troubleshooting.
  • Collaborate with analog, digital, and hardware engineers throughout design and validation cycles.
  • Support lab testing and characterization of high-speed serial links.

Requirements

Must-have technical skills and experience:

  • 13+ years of relevant industry experience in high-speed SerDes system development.
  • Strong modeling and simulation experience in MATLAB/Simulink.
  • Deep knowledge of DSP and communications theory: equalization, encoding, noise and crosstalk filtering.
  • Experience analyzing link budgets for PAM4 high-speed serial links.
  • Experience with wireline protocols (PCIe, Ethernet, JESD204C, CPRI) and optical protocols referenced in the posting.
  • Familiarity with circuit topologies used in high-speed SerDes Tx/Rx and equalization techniques.
  • Hands-on lab testing experience for high-speed serial links.
  • Proficiency in C, Verilog-A, and SystemVerilog; Python experience is a plus.

Education Requirements

M.Sc. or Ph.D. in Electrical or Computer Engineering.


About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

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Date Posted: 2026-09-03