SerDes Analog Design Engineer (Sr/Staff)
SynopsysJob Title
SerDes Analog Design Engineer (Sr/Staff)
Role Summary
Senior analog/mixed-signal engineer responsible for designing, verifying, and documenting analog sub-blocks within SerDes IP. Work with cross-functional teams to deliver silicon-proven circuits that meet power, area, and performance targets.
Member of the Solutions Group providing analog IP for SoC integration; responsible for circuit implementation from schematic through physical characterization.
Experience Level
Senior — Ph.D. with 5+ years or MSc with 10+ years of SerDes/high-speed analog design experience (see Education Requirements for details).
Responsibilities
Key responsibilities include design, verification, layout consultation, and documentation of analog and mixed-signal SerDes building blocks.
- Ensure analog sub-blocks meet SerDes specifications and architectural requirements.
- Develop and refine circuit implementations to meet power, area, and performance goals.
- Define verification strategies and use simulator features effectively for robust validation.
- Oversee and optimize physical layout to minimize parasitics, device stress, and process variation impacts.
- Collaborate with digital RTL engineers on calibration, adaptation, and control verification.
- Prepare and present simulation results for peer and customer review.
- Document design features, test plans, and consult on electrical characterization of circuits in the IP product.
Requirements
Must-have technical skills and practical experience.
- Transistor-level design experience of analog and mixed-signal building blocks (must be silicon-proven).
- Design experience with SerDes-related sub-circuits such as equalizers, data samplers, drivers, serializers/deserializers, VCOs, phase interpolators, DLL/PLL, bandgap, ADCs, and DACs.
- Experience optimizing CMOS layout to reduce parasitic resistance/capacitance, local device mismatch, and proximity effects.
- Awareness of ESD techniques and design-for-reliability concerns (electro-migration, IR, aging).
- Proficiency with EDA tools for schematic entry, physical layout, and design verification; strong SPICE simulation skills.
- Knowledge of Verilog-A for behavioral modeling and simulation control/data capture.
- Scripting/programming experience (TCL, Perl, C, Python, MATLAB) to automate flows and analysis.
Nice-to-have:
- Experience proposing and improving verification methodologies and simulator-driven strategies for analog IP.
Education Requirements
Ph.D. with 5+ years, or MSc with 10+ years of SerDes/high-speed analog design experience.
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
