Principal FPGA / RTL Design Engineer - Signal Processing
Senior technical contributor on the FPGA engineering team responsible for RTL design and implementation of signal-processing blocks for MIMO wireless systems. Works with systems, RF, and software engineers from concept through field deployment on mission-critical communications products.
Senior-level. The role requires substantial hands-on FPGA/RTL experience (see requirements for years of experience).
Primary duties include development, verification, and deployment of FPGA signal-processing designs.
Must-have technical skills, security, and screening requirements.
Required: Bachelor of Science in Electrical Engineering, Computer Science, or a closely related technical field. Preferred: MS or PhD in Electrical Engineering, Computer Science, or related fields. An advanced degree may reduce the practical experience threshold (the posting indicates 10 years' experience required, or 8 years with an advanced degree).
Company: Silvus Technologies
Headquarters: Irvine, CA, USA
Silvus Technologies is dedicated to connecting those who keep us safe, providing advanced Mobile Ad-hoc Network (MANET) radios powered by custom Mobile-Networked MIMO waveforms. Their technology enables vital communications for mission-critical applications in harsh environments. Following an acquisition by Motorola Solutions, Silvus is expanding its Strategic Growth organization to enhance its impact within U.S. Department of Defense programs.
