Senior VLSI Physical Design R&D Engineer (C++/Optimization)
Senior R&D engineer focused on VLSI physical-design optimization algorithms. Work on inventing new optimization engines and improving existing timing and placement/route optimization algorithms implemented in C++.
Position sits on an R&D team in Austin responsible for advancing tools and engines used in production chip physical design flows.
Senior β typically 6+ years of relevant industry experience (posting specifies over 6 years).
Design, implement, and benchmark algorithms that improve physical design quality and runtime.
Must-have technical skills and experience.
Nice-to-have: prior experience with placement/routing engines, scripting for EDA flows, or exposure to machine-learning-based optimization techniques.
Not specified.
Company: NVIDIA
Headquarters: Santa Clara, California, USA
NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.
