Senior Verification Engineer, Switch SoC

Job Title

Senior Verification Engineer, Switch SoC

Role Summary

Senior verification engineer on the Switch SoC team responsible for system-level verification, SOC assembly and cross-functional integration. The role drives delivery of verified models and milestones across cluster, sub-system and full‑SOC levels.

Work closely with design, physical design, software and validation teams to define HW/SW interfaces and deliver high-throughput, low-latency switch silicon.

Experience Level

Senior — the posting specifies 4+ years of practical semiconductor design and architecture experience building complex SoCs.

Responsibilities

Typical responsibilities include:

• Define project milestones, assign tasks and track progress using an agile framework.
• Define and develop system-level methodologies, tools and IP to build scalable SOCs.
• Drive SOC assembly and coordinate cross-functional teams to achieve SOC milestones.
• Integrate design blocks and deliver models for verification at cluster, sub-system, SOC and emulation levels.
• Collaborate with software teams to define HW/SW interfaces including control/status registers, interrupts and error handling.
• Develop and use scripts and automation (Perl, Python or similar) for verification and flow automation.

Requirements

Must-have technical skills and experience:

• 4+ years of practical semiconductor design and architecture experience building complex SoCs (experience requirement; degree details are listed in Education Requirements).
• Solid understanding of all phases of SOC development across multiple ASIC projects: architecture, micro-architecture, RTL design, verification, timing closure and physical design.
• Experience with design and verification tools (Verilog/SystemVerilog or equivalent, Cadence or equivalent simulation tools, debug tools).
• Proven experience working with software teams on HW/SW interfaces and system integration.
• Hands-on experience with successful tape-outs of complex, high-volume SoCs in advanced process nodes.
• Strong communication skills and ability to work cross-functionally.

Nice-to-have:

• Experience in synthesis, physical design and DFT.
• Background in RTL build, design automation, RTL coding and debug.
• Experience leading chip delivery and performing PPA (performance/power/area) analysis and trade-offs.
• Strong scripting/coding skills (Perl, Python, C/C++).

Education Requirements

BS or MS in Electrical Engineering, Computer Engineering, Computer Science or a related technical field, or equivalent practical experience. The posting explicitly allows "BS (or equivalent experience) / MS" and specifies 4+ years of semiconductor/SoC design and architecture experience.

About the Company

Company: NVIDIA

Headquarters: Santa Clara, California, USA

NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.