Senior Verification Engineer

Job Title

Senior Verification Engineer

Role Summary

Senior verification engineer responsible for planning and executing verification for IP, subsystem, and SoC designs based on Arm technology. The role develops reusable SystemVerilog/UVM verification environments, verification plans, and test suites and drives coverage closure across RTL, testbench, and silicon.

Works within a cross-functional hardware and software verification team to validate CPU, PCIe, security, DDR, coherency and interconnect functionality, performance scenarios, and power-aware behavior.

Experience Level

Senior — 3–12 years of experience in IP, Subsystem, or SoC verification.

Responsibilities

Deliver verification solutions and collaborate with architecture, design, and software teams to close functional and power-related issues.

• Define and execute verification strategies for IP, subsystem, and SoC-level designs.
• Architect, build and maintain reusable SystemVerilog/UVM verification environments and components.
• Create verification plans, test methodologies, directed and constrained-random tests, and coverage closure strategies.
• Develop embedded software tests in C/C++ and Arm assembly for system-level validation.
• Perform power-aware verification using UPF and validate complex power architectures.
• Drive functional, code, toggle, assertion, and formal coverage closure activities.
• Debug RTL, testbench, and silicon issues and coordinate fixes with Architecture, Design, Modeling, FPGA, and Software teams.
• Automate verification flows and test execution using scripting and CI where applicable.

Requirements

Must-have technical skills and experience for successful performance in this role.

• 3–12 years of IP, subsystem, or SoC verification experience.
• Strong knowledge of Verilog/SystemVerilog and experience developing SV/UVM verification environments.
• Solid understanding of SoC concepts: CPU architectures, memory hierarchy, coherency protocols, interconnects, and SoC integration/verification flows.
• Experience verifying CPU/PCIe/security/DDR subsystems, cache coherency and CHI-style interconnects, and SoC scenarios/performance.
• Experience writing embedded tests in C/C++ and Arm assembly.
• Power-aware verification experience (UPF) and validating power architectures.
• Coverage closure experience: functional, code, toggle, assertion; strong debugging and problem-solving skills.
• Automation and scripting skills: Python, Perl, Tcl, Shell.
• Exposure to all verification stages: requirements analysis, planning, testbench development, test creation, coverage, and documentation.
• Nice-to-have: formal methods exposure, FPGA prototyping/validation, performance modeling experience.

Education Requirements

Not specified.

About the Company

Company: Arm

Headquarters: Cambridge, United Kingdom

ARM is a global leader in semiconductor and software design, driving innovation in computing technology. The company specializes in designing processors and systems that provide the essential building blocks for electronic devices. ARM's architecture is widely used in smartphones, servers, and IoT devices, and its collaborative culture fosters bold thinking, diversity, and high-impact benefits for its talented workforce.