Senior Verification Engineer

Job Title

Senior Verification Engineer

Role Summary

Join an ASIC design verification team responsible for verifying complex blocks, subsystems and SoCs. The role leads verification strategy and execution using SystemVerilog/UVM, formal methods and coverage-driven techniques to achieve verification closure for next-generation semiconductor products.

The team operates in a fast-paced engineering environment focused on scalable, reusable verification infrastructure and cross-functional collaboration with architecture, RTL, physical design and post-silicon teams.

Experience Level

Senior — typically requires a Bachelor's degree plus 8+ years in ASIC/FPGA design verification, or a Master’s degree plus 6+ years (per minimum qualifications).

Responsibilities

Primary responsibilities include:

• Define and implement scalable, reusable verification plans, test benches and environments for blocks, subsystems and SoCs.
• Lead verification execution: create detailed test plans, drive technical reviews with design and architecture teams, and validate plans.
• Implement and run simulation and verification models to verify functionality, analyze power and performance, and identify bugs.
• Reproduce, root-cause and debug issues in the pre-silicon environment and implement corrective measures.
• Collaborate with SoC architects, microarchitects, RTL developers, post-silicon and physical design teams to verify complex features.
• Improve functional verification infrastructure and methodologies, including coverage-driven and formal approaches.
• Absorb post-silicon learnings, update test plans for missing coverage and apply improvements to future products.
• Lead and mentor junior engineers, fostering technical growth and driving team delivery.

Requirements

Must-have skills and experience:

• Strong SystemVerilog and UVM expertise; solid understanding of object-oriented programming principles applied to verification.
• Experience designing and implementing UVM- and/or formal-based verification architectures and methodologies.
• Proven use of coverage-driven verification, constrained-random testing and advanced debug techniques.
• Experience with industry-standard protocols such as AMBA AXI/AXI-S/CHI and common low-speed interfaces (UART, SPI, I2C/I3C).
• Ability to implement and run block/subsystem/SoC simulations and to analyze power and performance in the verification context.
• Strong collaboration and communication skills to drive technical reviews and cross-team problem resolution.

Preferred:

• Hands-on experience with simulators such as Synopsys VCS, Cadence Xcelium or equivalent.
• Experience with scripting languages for automation and tooling.
• Practical experience with formal verification tools and advanced validation/debug methodologies.
• Proven track record mentoring or leading verification engineers on complex projects.

Education Requirements

Minimum: Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related STEM field with 8+ years of ASIC/FPGA design verification experience, OR a Master’s degree in those fields with 6+ years of ASIC/FPGA design verification experience. Preferred: graduate/post-graduate degree in electrical engineering, computer engineering, computer science, or related STEM fields.

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.