Senior Validation Engineer

Job Title

Senior Validation Engineer

Role Summary

As a Senior Validation Engineer on the ASIC Engineering team in Toronto, you will validate high-speed SerDes and I/O, perform silicon bring-up, characterize analog blocks, run PHY/Link Layer/Protocol compliance tests, debug hardware issues, and produce validation reports and test methodologies. You will work with cross-functional teams to support IP/SoC validation and product qualification.

Experience Level

Senior — minimum qualifications specify: Bachelor's degree plus 2+ years of ASIC design/verification/validation/integration experience; or Master's plus 1+ year; or PhD.

Responsibilities

Primary responsibilities include:

• Characterize analog blocks and perform PHY/Link Layer/Protocol compliance testing (PCIe, Ethernet, UCIe).
• Bring up silicon, debug hardware and firmware issues, and present test results.
• Generate validation reports and document findings.
• Define test plans and develop test methodologies for electrical and protocol tests.
• Develop and standardize test scripts and automate test equipment.
• Specify and procure test equipment and accessories for validation tasks.
• Analyze signal integrity and power integrity on evaluation boards and silicon.

Requirements

Core technical requirements and preferred skills.

• Must-have: Strong knowledge of PCIe (Gen1–Gen7), IEEE 100G CK, OIF 100G CEI (VSR, MR, LR), 224G, UCIe, and other high-speed interface specifications.
• Must-have: Strong programming/scripting skills (Python, Perl, Matlab, C/C++ or similar) for test automation and data processing.
• Must-have: Proficiency with test instruments and automation (oscilloscopes, BERT, logic analyzers/exercisers, VNA, power supplies, multimeters).
• Must-have: Solid understanding of SerDes architectures and analog building blocks (NRZ, PAM4, PLL, CDR, CTLE, FFE, DFE) and direct SerDes electrical validation experience.
• Must-have: Experience with compliance software (e.g., SIGTEST, SEASIM, COM) and PCB signal-integrity considerations (insertion loss, return loss, TDR).
• Nice-to-have: Hands-on experience with PCIe and Ethernet protocol layers; familiarity with MAC and PCS design blocks.
• Nice-to-have: Experience in optical validation and die-to-die validation.
• Nice-to-have: Experience with data post-processing tools (Mango Database, HTML, JavaScript) for analysis and reporting.

Education Requirements

Required: Bachelor's degree in Science, Engineering, or a related field (examples: Engineering Science, Electrical and Computer Engineering, Computer Science) plus 2+ years of relevant ASIC design/verification/validation/integration experience; or a Master's degree in Science/Engineering or related field plus 1+ year of relevant experience; or a PhD in a related technical field.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.