Senior Test Engineer, Hardware Compute Group
AmazonJob Title
Senior Test Engineer, Hardware Compute Group
Role Summary
Senior Test Engineer responsible for first-silicon debug, test program development, yield analysis and production ramp for SoC products within the Hardware Compute Group. The role works closely with design teams, OSAT test partners, and test operations to enable new product introduction and improve manufacturing yield and test cost.
Experience Level
Senior - requires senior-level experience. The posting requests 10+ years in semiconductor digital design, test, or product engineering for complex SoCs.
Responsibilities
Key responsibilities include leading silicon debug, defining test flows, and driving yield and production readiness.
- Lead first-silicon debug with design and OSAT test engineering teams.
- Define and finalize wafer-sort and final-test program flows to meet coverage and manufacturability goals.
- Perform test data collection, analysis and bench correlation during verification and correlation phases.
- Drive yield analysis and corrective actions from engineering samples through production ramp.
- Identify root causes of yield loss using statistical analysis and failure analysis techniques.
- Manage and transfer product/test knowledge to OSAT sustaining engineers and coordinate with test contractors during early production.
- Support test operations to ship engineering samples and production quantities while optimizing test time and cost.
Requirements
Concise list of required and preferred skills. Education items are summarized below in Education Requirements.
- Must-have: 10+ years in semiconductor digital design, test, or product engineering for complex SoCs; hands-on experience with SoC development lifecycle and multiple ASIC projects.
- Must-have: Experience in new product introduction (first silicon through qualification and characterization) for high-volume SoCs in advanced process nodes.
- Must-have: Strong analytical, troubleshooting, communication, and teamwork skills; prior experience managing a team of test engineers.
- Nice-to-have: Experience with ATE systems (e.g., J750, Advantest 93K), chip circuit/physical design knowledge (timing, power), or design verification correlation skills.
- Nice-to-have: Post-silicon debug experience (speed-path/Vmin, memory arrays, clocking), logic debug using scan-dump/mem-dump, and familiarity with ATE coverage, margining, binning and scan pattern generation.
- Nice-to-have: Characterization experience with CPU subsystems and interfaces such as DDR4/LPDDR4/LPDDR5, USB, eMMC, CSI/DSI, and MIPI.
Education Requirements
Required: Bachelor's degree in Engineering, Computer Science, or equivalent practical experience. Preferred: Master's or Ph.D. in Electrical Engineering or a related field. The posting allows equivalent experience in place of a degree.
About the Company
Company: Amazon
Headquarters: Seattle, Washington, United States
Amazon is a global leader in e-commerce and cloud computing, committed to delivering fast, reliable services across diverse sectors. The company's innovative technologies include AWS, Kindle, and Echo, as well as developing low Earth orbit satellite networks for improved internet connectivity worldwide.
