Senior Technical Staff Engineer - SOC Verification

Job Title

Senior Technical Staff Engineer - SOC Verification

Role Summary

Technical lead responsible for architecting and executing SoC verification strategies for next-generation 16-bit and 32-bit microcontroller products. Work with architecture, design, firmware, validation, and distributed verification teams to deliver first-pass silicon success and improve verification methodology and automation.

Experience Level

Senior — typically requires 12+ years of experience in digital design verification, with proven SoC or MCU tape-out experience.

Responsibilities

Lead technical verification activities across block, subsystem, and full-chip levels and drive methodology, automation, and quality metrics.

• Own and execute comprehensive SoC-level verification plans from architecture through tape-out.
• Develop SystemVerilog/UVM verification environments, reusable testbench components, checkers, assertions, and stimulus.
• Verify complex digital IP and integrations, drive RTL, gate-level, and full-chip verification activities.
• Define and track coverage goals (functional, code, assertion, safety) and coverage closure strategy.
• Debug full-chip issues across architecture, RTL, firmware interaction, and verification infrastructure.
• Develop functional safety verification strategies, fault-injection tests, and safety metrics.
• Advocate and implement verification best practices, automation frameworks, and AI-assisted workflows.
• Mentor and provide technical leadership to junior engineers; influence architecture and verification methodology decisions.

Requirements

Key technical must-haves and preferred skills for successful performance in this role.

Must-have

• 12+ years of experience in digital design verification with SoC or MCU tape-out history.
• Strong expertise in SystemVerilog, UVM, and coverage-driven verification methodologies.
• Hands-on experience verifying SoCs with ARM or comparable embedded processors; familiarity with AMBA protocols (AXI, AHB, APB).
• Experience developing verification plans, testbenches, checkers, assertions, and coverage models.
• Strong RTL and full-chip debugging skills across simulations, regressions, and integration environments.
• Proven ability to influence technical decisions and collaborate across geographically distributed teams; strong communication skills.

Nice-to-have

• Experience with formal verification tools (e.g., JasperGold, VC Formal) and gate-level/low-power verification methodologies.
• Familiarity with functional safety standards (e.g., ISO 26262), fault-injection, and safety coverage analysis.
• Experience with verification automation and scripting (Python, Perl, etc.) and leveraging AI-assisted techniques to improve verification quality and regression efficiency.
• Exposure to post-silicon validation and mixed-signal/AMS verification environments.
• Prior experience providing technical leadership, mentoring, or leading methodology/automation initiatives.

Education Requirements

BS, MS, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related discipline; equivalent technical experience may be acceptable.

About the Company

Company: Microchip

Headquarters: Chandler, Arizona, USA

Microchip is a leading semiconductor company focused on developing innovative solutions to enhance the human experience. With a commitment to empowering innovation, Microchip prioritizes the value of its employees by fostering a culture that supports their growth and contributions.