Job Title
Senior Systems Design Engineer - Data Center GPU
Role Summary
Join AMD's Data Center GPU Systems Design Engineering team to lead post-silicon validation and system-level debug for data-center GPU SoCs. The role focuses on validating system IP, debugging hardware/software interactions, and driving cross-team root-cause resolution to ensure product quality.
This position works closely with design, firmware, driver, runtime, and kernel teams to deliver scalable, automated validation and debug solutions for complex SoC and chiplet-based designs.
Experience Level
Senior-level (Sr.). No explicit years-of-experience specified in the posting.
Responsibilities
Primary responsibilities cover post-silicon validation, system-level debug, and cross-team triage from bring-up through production.
- Develop and execute SOC-level post-silicon test plans; track coverage and report issues across program milestones.
- Debug hardware and system-level failures discovered during bring-up, validation, and production, focusing on system IP such as DMA engines, interrupt controllers, and data paths.
- Analyze scan dumps and debug reports to investigate hangs, stalls, and error conditions at IP and system levels.
- Collect and correlate debug data across multiple IP domains to triage failures and identify root causes.
- Coordinate test execution and validation efforts across design, firmware, driver, and software teams to validate and optimize features on schedule.
- Develop and maintain validation content targeting error handling, fault injection, and power-management scenarios.
- Participate in collaborative triage and progressively take ownership of specific IP areas.
Requirements
Core technical skills and domain experience expected for successful performance in this role.
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Must-have: Experience in post-silicon validation or hardware debug for semiconductor SOCs or related roles.
- Proficient programming/scripting skills (C/C++, Python, Perl) for test development and automation.
- Board/platform-level debugging experience including bring-up, sequencing, analysis, and optimization.
- Knowledge of SoC system architecture and software-hardware interactions (DMA, interrupt handling, memory and I/O subsystems).
- Experience with scan dump analysis or JTAG-based post-silicon debug tools and techniques.
- Strong analytical and problem-solving ability; able to independently drive tasks to completion and ramp on new IP domains.
Nice-to-have:
- Familiarity with cache hierarchies, buffer management, ring buffers, FIFO structures, and credit-based flow control.
- Knowledge of virtual memory, address translation, TLBs, and page fault handling.
- Exposure to RAS concepts (error detection, poison propagation, machine check logging, watchdogs) and fault-injection testing.
- Experience with multi-die/chiplet-based designs and power-management dependent validation.
- Familiarity with software runtime environments, kernel-level drivers, or OS interfaces that interact with hardware IPs.
Education Requirements
Bachelor's or Master's degree in Electrical or Computer Engineering (BEng/BE/BS/MS) is specified.
About the Company
Company: Advanced Micro Devices
Headquarters: Sunnyvale, California, USA
Advanced Micro Devices, or AMD, is a global semiconductor company that designs and manufactures microprocessors, graphics processors, and related technologies for a variety of computing devices. Known for pushing the boundaries of innovation, AMD's mission is to deliver high-performance computing solutions for AI, data centers, gaming, and embedded applications. They foster a collaborative, inclusive culture focused on creativity and problem-solving, aiming to drive progress and excellence in technology.

Date Posted: 2026-08-20