Senior System Architecture Specialist

Job Title

Senior System Architecture Specialist

Role Summary

Customer-facing presales technical role focused on UCIe / die-to-die IP and multi-die system architecture. You will engage directly with customer architects and engineering teams to define subsystem configurations, close architecture decisions, and reduce integration risk for chiplet and multi-die platforms.

Translate customer requirements and integration feedback into actionable input for Product Management and R&D, and produce reusable technical guidance and training for internal teams and customers.

Experience Level

Senior — requires 5+ years of relevant experience in semiconductor IP, SoC architecture, systems engineering, applications engineering, silicon validation, or other customer-facing technical roles.

Responsibilities

Lead technical engagements and provide architecture guidance for UCIe / die-to-die integrations across ASIC, SoC, and multi-die platforms.

• Own technical architecture engagement from requirements through architecture closure and initial deployment readiness.
• Work with customer architects to define UCIe/die-to-die subsystem configurations and IP integration approaches.
• Analyze system-level trade-offs: protocol selection, bandwidth, latency, power, area, packaging, validation, compliance, and interoperability.
• Provide configuration recommendations, risk assessments, and competitive positioning to support design wins.
• Translate customer platform requirements and constraints into clear input for Product Management and R&D.
• Develop application notes, reusable technical materials, and customer-facing guidance.
• Train field application engineers (FAEs) and customer teams on architecture, validation expectations, and deployment best practices.

Requirements

Must-have skills and experience for the role.

• 5+ years of experience in semiconductor IP, SoC architecture, systems engineering, applications engineering, silicon validation, or similar customer-facing technical roles.
• Solid understanding of UCIe / die-to-die IP concepts and system integration considerations.
• System-level knowledge of ASIC, SoC, and multi-die integration with ability to evaluate performance and implementation trade-offs.
• Proven experience engaging directly with customer architects, design teams, validation teams, and technical decision-makers.
• Ability to translate ambiguous customer requirements into clear technical recommendations and product feedback.
• Strong technical communication skills: clear written analysis and structured explanation of trade-offs to align customer, sales, product, and engineering teams.

Nice-to-have:

• Familiarity with protocols used in die-to-die systems (e.g., AXI, PCIe, CXL, CHI-C2C, CXS, Streaming).
• Experience with multi-die architectures, advanced packaging technologies, RTL design, verification, synthesis, static timing analysis, simulation, or silicon bring-up.
• Prior application engineering or direct customer-facing role supporting IP selection or integration.

Education Requirements

Bachelor's and/or Master’s degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or Computer Science.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.