Senior Staff/Staff Design Verification Engineer

Job Title

Senior Staff/Staff Design Verification Engineer

Role Summary

Lead verification for complex ASIC designs focused on Cerebras's large-scale AI processors. Work with architecture, RTL, firmware, physical design, and validation teams to define verification strategy, build reusable test environments, and ensure first-silicon quality across simulation, emulation, and silicon bring-up.

Experience Level

Senior — 10+ years of design verification experience.

Responsibilities

Define and execute verification plans and infrastructure to validate RTL and system-level behavior.

• Develop verification strategies, detailed tests, and coverage plans from micro-architecture.
• Create reusable verification environments and components (stimulus, checkers, assertions, coverage).
• Implement tests, run regressions, collect coverage, and debug failures across simulation and emulation.
• Collaborate with architecture, RTL design, physical design, firmware, and post-silicon teams during bring-up.
• Analyze and debug complex cross-domain issues spanning simulation, emulation, and silicon.
• Improve verification infrastructure and flows for scalability and efficiency.
• Contribute to verification methodology and best practices across teams.

Requirements

Core technical skills and experience required. "Nice-to-have" items are listed separately.

• Must-have: Strong SystemVerilog testbench knowledge, including UVM and DPI.
• Proven experience developing scalable, portable testbenches and verification components.
• Strong software engineering practices and object-oriented design applied to verification.
• Experience with simulators, waveform viewers, automation for build/run, coverage collection, and gate-level simulation.
• Proficient scripting experience (Python, Perl, or similar) for automation and tooling.
• Excellent debugging and problem-solving skills for complex RTL and system issues.
• Ability to work effectively in cross-functional teams and communicate technical issues clearly.
• Self-motivated and able to drive verification projects to completion.
• 10+ years of hands-on design verification experience.

• Nice-to-have: Knowledge of pipelined processor architecture; experience with large-scale AI/accelerator designs.

Education Requirements

Bachelor's or Master's degree in Computer Science or Electrical Engineering.

About the Company

Company: Cerebras

Headquarters: Sunnyvale, CA, USA

Developer of wafer-scale AI accelerators, Cerebras designs the Wafer Scale Engine (WSE)—one of the world’s largest AI chips—to deliver high-speed training and inference solutions for model labs, enterprises, and AI-native startups.