Senior Staff Software Development Engineer (C++, EDA, Place & Route)

Job Title

Senior Staff Software Development Engineer (C++, EDA, Place & Route)

Role Summary

Senior engineer on the FPGA place-and-route tools team responsible for designing and implementing high-performance place & route engines and security flows that optimize QoR (performance, area, runtime, memory) across Lattice FPGA product lines. The role requires working with other developers and cross-functional teams to add features, support new products, and maintain production EDA tools.

Experience Level

Senior-level; typically 12+ years of experience in EDA tool development (place & route).

Responsibilities

Primary responsibilities focused on place & route engine development, feature delivery, and quality improvement.

• Design and implement place & route engine features and capabilities.
• Develop advanced security flows such as Isolation Design Flow for FPGA designs.
• Improve engine quality and optimize QoR metrics: performance, area, runtime, and memory.
• Support new FPGA product lines and port/scale tools across architectures.
• Create and maintain unit tests and validation frameworks to ensure high quality.
• Collaborate cross-functionally and support customer issues related to tools.

Requirements

Must-have technical skills and experience; concise, prioritized list.

• Extensive experience (12+ years) developing EDA tools, with proven place & route engine development in either FPGA or ASIC domains.
• Proficient in C/C++ and comfortable with low-level performance optimization.
• Strong understanding of data structures, graph algorithms, and algorithmic problem solving.
• Experience with scripting for tool integration and automation (shell scripts).
• Experience writing unit tests and validation for complex software systems.
• Good written and verbal communication and ability to work in cross-functional teams.
• Right to work in India and ability to pass background and reference checks.

Nice-to-have:

• Specific FPGA place & route experience.
• Experience with multi-processing / parallelization techniques.
• Deep understanding of FPGA architectures and constraints.

Education Requirements

Bachelor's, Master's, or PhD in Electrical Engineering, Computer Science, or Computer Engineering (BS/MS/PhD in EE, CS, or CE) as stated in the posting.

About the Company

Company: Lattice Semiconductor

Headquarters: Portland, Oregon, USA

Lattice Semiconductor specializes in low power, small-form-factor programmable logic devices and solutions. The company is known for its innovative technology that enables a wide range of applications, including communication, consumer, and industrial markets.