Senior / Staff SoC DRAM System Engineer

Job Title

Senior / Staff SoC DRAM System Engineer

Role Summary

The engineer will design, validate, and optimize DRAM subsystems for Qualcomm IE‑IOT SoC platforms across Linux and RTOS environments. The role spans bring‑up, tuning, characterization, and cross‑team integration to deliver stable, high‑performance, low‑power memory solutions for edge devices.

Experience Level

Senior-level (Staff). Suitable for candidates with substantial professional experience in DRAM system engineering and SoC bring‑up.

Responsibilities

Primary duties focus on DRAM bring‑up, validation, and collaboration across hardware and software teams.

• Design and develop DRAM system solutions: controller, PHY, timing, calibration, and memory subsystem integration.
• Lead DRAM bring‑up, initialization, tuning, and validation from early silicon to production readiness.
• Configure and optimize memory controller and PHY registers to meet JEDEC, power, bandwidth, and latency targets.
• Perform DRAM characterization, stress testing, margin analysis, retention testing, and SI/PI correlation.
• Analyze and resolve system‑level memory issues across boot, suspend/resume, low‑power modes, and runtime workloads.
• Develop and maintain diagnostic tools, automated validation flows, test patterns, and debug procedures.
• Coordinate with SoC architecture, PCB, hardware, firmware, bootloader, kernel, validation, and DRAM vendors for integration and debugging.
• Prepare technical reports, present findings, and drive issue resolution with minimal supervision.

Requirements

Must-have technical skills and experience; preferred items listed separately.

• Deep knowledge of LPDDR3/LPDDR4/LPDDR5 operation, controller behavior, PHY interface, timing, training, and calibration.
• Proven experience leading DRAM bring‑up, initialization, configuration, tuning, and validation on embedded SoC platforms.
• Experience with DRAM characterization: margin sweeps, read/write window analysis, retention testing, and failure reproduction.
• Familiarity with signal integrity and power integrity validation and working with PCB/layout teams on routing and constraints.
• Comfortable with Linux‑based embedded systems and debugging low‑level software interactions with DRAM.
• Hands‑on use of logic analyzers, oscilloscopes, and memory test equipment for post‑silicon validation.
• Programming and scripting experience (C, C++, Java, Python) and familiarity with automated validation flows and diagnostic tooling.
• Strong debugging skills for kernel and system stability issues related to memory behavior.
• Occasional travel across APAC and other regions may be required.

Nice-to-have: experience working directly with DRAM vendors on datasheets/errata, and prior post‑silicon validation planning.

Education Requirements

Degree or equivalent experience expected: Bachelor's, Master's, or PhD in Electrical Engineering, Engineering, Computer Science, Information Systems, or a related technical field are cited across the qualifications. Posting describes degree‑and‑experience combinations (e.g., Master's + 3+ years, PhD, or Bachelor's + 4+ years) and allows related‑field equivalence.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.