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Senior / Staff SoC DRAM System Engineer

Qualcomm
July 16, 2026
Full-time
On-site
Hsinchu, Taiwan
Test Engineering Jobs, Level - Senior

Job Title

Senior / Staff SoC DRAM System Engineer

Role Summary

Design and develop DRAM system software solutions for Qualcomm IE‑IOT SoC platforms across Linux and RTOS environments. Work spans DRAM controller, PHY, timing, calibration, bring‑up, validation, and system integration to enable high‑performance, low‑power, and reliable memory subsystems for edge and embedded products.

Collaborate with cross‑functional SoC architecture, hardware, firmware, bootloader, kernel, validation, PCB, and vendor teams to deliver production‑ready memory subsystems.

Experience Level

Senior. Typical experience aligns with the posted minimums (examples given: Master's +3 years, Bachelor's +4 years, or PhD +2 years); role expects experienced engineers capable of leading DRAM bring‑up and validation activities.

Responsibilities

Primary duties include design, bring‑up, validation, and cross‑team integration of DRAM subsystems on SoC platforms.

  • Design, develop, and evaluate DRAM system solutions including controller, PHY, timing, calibration, and memory subsystem integration for IE‑IOT SoCs.
  • Lead DRAM bring‑up, initialization, tuning, and validation from early silicon through production readiness.
  • Configure and optimize memory controller and PHY settings to meet JEDEC specs, power targets, bandwidth, latency, and system goals.
  • Perform DRAM characterization, stress testing, margin analysis, retention testing, and SI/PI correlation to identify stability risks.
  • Analyze and resolve system‑level memory issues across boot, suspend/resume, low‑power modes, and runtime workloads.
  • Develop and maintain diagnostic tools, automated validation flows, test patterns, and debug procedures to improve reliability and regression coverage.
  • Conduct design and validation reviews, failure analysis, technical documentation, and present findings to stakeholders and leadership.
  • Coordinate and drive DRAM‑related deliverables across cross‑functional teams with minimal supervision; occasional APAC and regional travel may be required.

Requirements

Must‑have technical skills and experience required on day one.

  • Strong knowledge of DRAM subsystem architecture and operation (LPDDR3/LPDDR4/LPDDR5), controller behavior, PHY interfaces, timing, training, and calibration flows.
  • Proven experience in DRAM bring‑up, register configuration, controller/PHY tuning, and validation on embedded SoC platforms.
  • Experience performing DRAM characterization, stress tests, margin sweeps, read/write window analysis, retention validation, and failure reproduction.
  • Ability to analyze and resolve timing violations, calibration failures, data corruption, bandwidth bottlenecks, and power‑state transition issues.
  • Experience with signal integrity (SI) and power integrity (PI) validation and collaboration with hardware/layout teams on routing and layout constraints.
  • Skilled using logic analyzers, oscilloscopes, and memory test equipment; comfortable with low‑level debugging on Linux‑based embedded systems.
  • Experience developing automated validation flows, diagnostic tools, and memory test patterns; familiarity with test automation and validation coverage planning.
  • Practical programming/debugging experience in low‑level languages and scripts (examples in source: C, C++, Python, Java) and general debugging techniques.

Nice‑to‑have:

  • Experience debugging kernel panics or stability issues caused by DRAM misconfiguration.
  • Familiarity with memory low‑power states (self‑refresh), post‑silicon validation, and working with DRAM vendors on datasheets and errata.
  • Experience working in globally distributed, cross‑disciplinary teams.

Education Requirements

Bachelor's, Master's, or PhD in Electrical Engineering, Engineering, Information Systems, Computer Science, or a related technical field are listed in the posting. Examples of acceptable combinations given in the source: Bachelor's + ~4 years experience, Master's + ~3 years experience, or PhD + ~2–3 years experience. The posting does not list specific certification requirements; equivalent practical experience in lieu of degree is implied by the multiple degree/experience combinations.


About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.

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Date Posted: 2026-07-15