Senior Staff Program Manager

Job Title

Senior Staff Program Manager

Role Summary

Lead end-to-end program execution for complex silicon design initiatives within the Photonic Fabric Hardware Engineering Program Management team. Drive delivery of next-generation semiconductor solutions across architecture, RTL, verification, DFT, physical design, firmware/software integration, post-silicon characterization, and mass-production ramp.

This is a high-visibility role coordinating cross-functional engineering, product, and operations teams, managing external suppliers, and reporting program status and risks to senior executives. Expected base pay range (USD): 132,610 - 198,600 per year.

Experience Level

Senior-level. The role requires significant program management experience in the semiconductor industry (7+ years); typical candidates have 8–15 years of relevant experience depending on degree level.

Responsibilities

Manage program delivery across the full silicon lifecycle and ensure alignment between engineering execution and business objectives.

• Own end-to-end program execution across architecture, RTL, DV, DFT, PD, FW integration, post-silicon bring-up, and production ramp.
• Drive tapeout readiness, milestone tracking, and sign-off across disciplines; manage bring-up, errata, and corrective actions to closure.
• Develop and maintain program plans (WBS, schedules, risk registers) and lead program reviews and executive updates.
• Manage foundry, OSAT, IP, and other third-party vendor relationships; track commitments and escalate risks proactively.
• Coordinate cross-functional issue resolution in a large matrix organization and lead continuous process improvements to accelerate delivery.

Requirements

Must-have technical and leadership qualifications; listed items reflect core requirements and key preferences where specified.

• 7+ years of program management experience in the semiconductor industry, driving SoC/hardware programs from definition to mass production.
• Working knowledge of full silicon development flow: RTL, verification, DFT, physical design, firmware/software integration, post-silicon characterization, and packaging.
• Familiarity with TSMC advanced-node flows (N5/N4/N3/N2+) including process milestones, yield ramp, and PCN management.
• Proven vendor and subcontractor management experience (foundry, OSAT, IP suppliers); experience negotiating SOWs and tracking external commitments.
• Strong communication, cross-functional leadership, and risk-management skills; experience presenting to senior technical and business stakeholders.

Education Requirements

Required: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field is stated (BS level associated with 10–15 years experience). Preferred: Master's degree (MS) with an indicated 8–10 years experience. PMP certification is listed as preferred. The posting associates specific years-of-experience expectations with degree level but does not state an explicit "or equivalent experience" clause.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.