Senior Staff/Principal Engineer, Digital Design (Power & Analog ICs)
RenesasJob Title
Senior Staff/Principal Engineer, Digital Design (Power & Analog ICs)
Role Summary
Senior individual-contributor responsible for architecting and delivering digital content inside power, analog, and mixed-signal IC products. Ownership spans requirements and microarchitecture through RTL, synthesis, timing closure, DFT support, verification, and silicon bring-up.
Works closely with analog, physical-design, test, verification, applications, and product teams to produce area- and power-optimized digital blocks embedded in ICs rather than large processor SoCs.
Experience Level
Senior - typically 10+ years of relevant digital design and implementation experience for semiconductor products.
Responsibilities
Deliver high-quality digital blocks for power and analog ICs and lead technical direction for microarchitecture, RTL, implementation, verification, and silicon support.
- Translate product and circuit requirements into digital microarchitecture and block-level specifications.
- Design synthesizable RTL for control, sequencing, protection, diagnostics, trimming, communication, test, and low-power functions.
- Define and own block integration and contribute to chip-level decisions: interfaces, clocking, reset, power states, and register maps.
- Develop synthesis scripts, timing constraints, and implementation collateral; drive synthesis, CDC/RDC, lint, and STA sign-off activities.
- Support DFT architecture and implementation including scan insertion, ATPG enablement, and production-test requirements.
- Collaborate on verification planning, create directed tests or vectors, and support gate-level/post-layout verification and silicon bring-up.
- Work with place-and-route teams to resolve timing, congestion, power, and post-layout issues.
- Drive reusable RTL, coding standards, review practices and mentor junior/mid-level engineers.
- Identify technical and schedule risks early and communicate clear trade-offs and recommendations to project leadership.
Requirements
Key skills and experience required to perform the role. Education requirements are listed separately below.
Must-have
- 10+ years of hands-on experience in digital design, RTL development, synthesis, and implementation for semiconductor products.
- Deep experience with logic design, microarchitecture, and Verilog/SystemVerilog RTL coding.
- Proven skills in synthesis flows, static timing analysis, timing-constraints development, and timing closure at block and top levels.
- Experience designing digital control logic embedded in PMICs, power-management, automotive, audio, or other mixed-signal ICs.
- Working knowledge of clocks, resets, low-power states, FSMs, register interfaces, fault handling, and HW–SW interaction.
- Practical experience with DFT (scan, ATPG), CDC/RDC, lint, and gate-level verification.
- Scripting and automation skills (TCL, Python, Perl, shell, or similar) to support flows and tooling.
- Proven ability to own complex blocks, lead technical reviews, and mentor engineers across multisite teams.
Nice-to-have
- Prior experience with production silicon bring-up, failure analysis, and documenting device workarounds.
- Experience interfacing closely with analog designers and physical-design/CAD teams on mixed-signal products.
Education Requirements
Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related discipline (as stated). No alternative-equivalent-degree language was provided in the posting.
About the Company
Company: Renesas
Headquarters: Hitachinaka, Japan
Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.
