Senior Staff Physical Design Manager

Job Title

Senior Staff Physical Design Manager

Role Summary

Lead and provide technical direction for the Physical Design team in Santa Clara, driving methodology and execution for netlist-to-GDS flows on next-generation, high-performance processor and data-center SoCs in advanced CMOS nodes.

Experience Level

Senior-level role. Typically requires substantial hands-on ASIC/SoC physical design experience and leadership responsibility.

Responsibilities

Key responsibilities include technical leadership, project oversight, and cross-team collaboration.

• Provide technical direction, coaching, and mentorship to team members and other engineers.
• Plan and assign project resources, monitor progress, and communicate status to stakeholders.
• Lead physical design and methodology activities from netlist handoff through GDSII tape-out.
• Partner with ASIC design teams (timing, RTL, verification, DFT) to achieve tape-out targets.
• Serve as management interface to ASIC customers when required.
• Lead recruiting efforts and participate in hiring and onboarding of experienced engineers and new graduates.

Requirements

Must-have technical skills and professional attributes; preferred items listed separately.

• Must-have: Practical background in ASIC or SoC development with strong physical design expertise (floorplanning, place-and-route, clock tree synthesis, timing closure, physical verification).
• Must-have: Ability to manage multiple technical projects and handle varied assignments with minimal supervision.
• Must-have: Strong written and verbal communication skills and ability to collaborate in a fast-paced, distributed environment.
• Must-have: Self-driven with experience partnering across worldwide teams.
• Nice-to-have: Experience leading semiconductor product development or tape-out projects and mentoring high-performance teams.
• Nice-to-have: Experience as top-level physical design lead, STA chip lead, or chip DFT lead; project management and customer interface experience.
• Nice-to-have: Experience working with distributed teams.

Education Requirements

Bachelor's degree in Computer Science, Electrical Engineering, or related field with 5–10 years of related experience; or Master’s degree and/or PhD in Computer Science, Electrical Engineering, or related fields with 3–5 years of experience; or equivalent professional experience in lieu of a formal degree.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.