Senior/Staff Nanofabrication and Characterization Engineer
NeurophosJob Title
Senior/Staff Nanofabrication and Characterization Engineer
Role Summary
Hands-on engineer responsible for prototype metasurface chip fabrication, integration, and optical/electro-optic characterization to support development of an optical vector-matrix multiplication engine. The role operates across university shared-user cleanrooms and an in-house lab, owning process flows, device assembly, and measured device feedback into design.
Experience Level
Senior. The role expects an experienced engineer with at least 3+ years of hands-on cleanroom nanofabrication experience.
Responsibilities
Deliver prototype metasurface devices from process design through measured characterization and transfer learnings to design and foundry partners.
- Develop and document multi-step process flows (lithography, deposition, etch, planarization) for metasurface designs.
- Pattern sub-200 nm features and perform multilayer alignment using e-beam lithography and optical/deep-UV tools; maintain resist, dose, and proximity-correction recipes.
- Perform metal and dielectric deposition and dry etch (sputter, evaporation, PECVD, ALD, RIE/ICP) and control profile, thickness, and uniformity.
- Implement multilevel metal–dielectric integration with vias and planarization (CMP, damascene, lift-off) and troubleshoot interlayer yield issues.
- Integrate active tunable layers, dice, mount, wire-bond, and prepare devices for testing.
- Execute process metrology (SEM, FIB cross-sectioning, AFM, profilometry, ellipsometry) and feed as-built data back to design teams.
- Measure optical and electro-optic device responses (reflectance, spectra, polarization, voltage-dependent tuning) and correlate to simulations.
- Manage facility access, tool scheduling, materials, run records, and maintain reproducible run documentation.
- Mentor technicians and engineers on cleanroom practice, safety, and metrology; assist process transfer to foundry partners.
Requirements
Essential technical skills and practical experience required to perform the role; preferred items listed separately.
- Must-have: 3+ years hands-on cleanroom experience fabricating nanophotonic, metasurface, plasmonic, MEMS, or semiconductor devices and independent ownership of multi-step process flows.
- Must-have: Direct experience with electron-beam lithography and multilayer alignment at sub-200 nm feature sizes, including resist processing and proximity correction.
- Must-have: Practical experience with metal and dielectric deposition and dry etch, including recipe development for profile, selectivity, and uniformity (sputter, evaporation, PECVD, ALD, RIE/ICP).
- Must-have: Proficiency with metrology tools (SEM, AFM, ellipsometry, profilometry); FIB cross-sectioning is strongly desired.
- Must-have: Experience measuring optical responses of nanostructured devices using microscope-based reflection/transmission spectroscopy and polarization optics.
- Must-have: Proficiency in Python and/or MATLAB for data and image analysis; familiarity with mask/layout tools such as KLayout or L-Edit.
- Must-have: Strong cleanroom safety practices, hazardous-chemicals handling, and laser safety for optical bench work.
- Nice-to-have: Experience in shared-user university nanofabrication facilities and qualifying new tools quickly.
- Nice-to-have: Damascene metallization, CMP, ALD of conformal liners, or other planarization experience.
- Nice-to-have: Experience with tunable optical materials (liquid crystals, electro-optic polymers, phase-change materials), post-CMOS processing, dicing, die attach, wire bonding, and foundry process transfer.
- Nice-to-have: Nanophotonic/metasurface design or full-wave simulation experience (FDTD, FEM, RCWA), and statistical process control / DOE expertise.
Education Requirements
MS or PhD in Electrical Engineering, Materials Science, Applied Physics, Optics, or a closely related field with thesis or work centered on nanofabrication.
About the Company
Company: Neurophos
Headquarters: Sunnyvale, California, United States
Startup developing silicon-photonic AI accelerator chips that use programmable metasurfaces and dense optical cells to perform matrix multiplications at the speed of light, targeting large-scale AI inference with much higher energy efficiency and performance than traditional electronic approaches.
