Senior Staff Memory Design Engineer

Job Title

Senior Staff Memory Design Engineer

Role Summary

Lead transistor-level design and optimization of SRAM bitcells and peripheral circuits for advanced FinFET process nodes. Work with layout, verification, and silicon teams to deliver production-quality memory IP used in AI accelerators, mobile SoCs, networking, and automotive products.

Experience Level

Senior — 10+ years of hands-on SRAM and custom analog/mixed-signal design in production environments.

Responsibilities

Key responsibilities include:

• Design and optimize SRAM bitcells and peripheral circuits (sense amps, write drivers, precharge, decoders, read/write assist) for advanced nodes (7nm, 5nm, 3nm).
• Run transistor-level simulations (HSPICE, PrimeSim), Monte Carlo, variability, SNM, and reliability analyses across PVT corners to close designs.
• Develop and enhance SRAM compiler and automated memory generation flows to balance power, performance, area, and yield.
• Collaborate with layout engineers on custom cell design and parasitic closure through LVS/DRC/PEX iterations to meet timing and power targets.
• Support silicon bring-up and debug; correlate lab measurements with simulation and identify root causes for mismatches.
• Automate design and validation workflows using Python, Perl, TCL, and shell scripting to improve repeatability and efficiency.
• Mentor junior engineers on circuit design techniques, simulation methodologies, and design-for-manufacturing.

Requirements

Must-have technical skills and experience; concise list.

• Must-have: 10+ years of experience designing SRAM memory circuits and custom analog/mixed-signal blocks in production environments.
• Must-have: Deep expertise in SRAM bitcell design and peripheral circuits (sense amps, write drivers, decoders, assist circuits) and memory architecture.
• Must-have: Strong proficiency with HSPICE/PrimeSim and Synopsys toolchain components such as Custom Compiler, StarRC, IC Validator, and PrimeTime.
• Must-have: Solid understanding of CMOS device physics, FinFET technology, and design challenges at advanced nodes (16nm/7nm/5nm/3nm).
• Must-have: Experience with Monte Carlo analysis, PVT validation, SNM analysis, and reliability simulations.
• Must-have: Scripting skills in Python, Perl, TCL, or shell for automation and flow development.
• Nice-to-have: Experience developing SRAM compilers or memory generators.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, VLSI Design, Microelectronics, or a related technical field.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.