Senior Staff Interface IP Verification Engineer (Pre-Silicon - PCIe/CXL/DDR/Ethernet)

Job Title

Senior Staff Interface IP Verification Engineer (Pre-Silicon - PCIe/CXL/DDR/Ethernet)

Role Summary

Lead pre-silicon verification of interface IP blocks (PCIe, CXL, DDR, Ethernet) for SoC and IP products. Work within the IP verification team to design and implement verification environments, create verification plans, execute regressions, and diagnose failures to ensure protocol compliance and coverage closure.

Experience Level

Senior-level (title: Senior Staff). Years of experience not specified in the source.

Responsibilities

Primary responsibilities include verification planning, environment development, and closure of verification cycles for interface IP.

• Design and implement verification environments and UVM testbenches for interface IP.
• Develop directed, constrained-random, and protocol-aware tests for PCIe, CXL, DDR, and Ethernet.
• Run and maintain regression suites; analyze failures and drive root-cause to resolution.
• Measure and close functional and code coverage; create coverage-driven verification plans.
• Collaborate with RTL designers, architects, and validation teams to resolve issues and plan silicon bring-up.
• Mentor junior engineers and contribute to verification toolchain and methodology improvements.

Requirements

Must-have skills and technologies expected for the role; preferred items listed where applicable.

• Must-have: Strong experience in pre-silicon verification of interface IP (PCIe, CXL, DDR, Ethernet) or equivalent protocol verification experience.
• Must-have: Proficiency with SystemVerilog and UVM; experience developing verification environments and test suites.
• Must-have: Experience with assertion-based verification, coverage-driven verification, and debugging simulation failures.
• Must-have: Familiarity with simulation and verification tools (industry simulators, log analysis, waveform debug).
• Must-have: Scripting skills for automation (e.g., Python, TCL); experience maintaining regression infrastructure.
• Nice-to-have: Experience with formal verification, emulation, hardware bring-up, or protocol VIP stacks.
• Nice-to-have: Prior work on complex SoC IP, multi-die protocols, or performance/latency validation.

Education Requirements

Not specified.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.