Senior Staff Interface IP Verification Engineer (Pre-Silicon — PCIe/CXL/DDR/Ethernet)

Job Title

Senior Staff Interface IP Verification Engineer (Pre‑Silicon — PCIe/CXL/DDR/Ethernet)

Role Summary

Lead pre‑silicon verification for high‑speed interface IP within the Interface IP team in Bengaluru. Own verification strategy, environment development, cross‑functional debugging, and technical leadership to achieve functional sign‑off and silicon readiness.

Experience Level

Senior — requires 8+ years of hands‑on ASIC or SoC verification experience.

Responsibilities

Primary responsibilities include end‑to‑end verification, environment development, and mentorship.

• Own verification from architecture review through silicon sign‑off for PCIe, CXL, DDR, and Ethernet IP.
• Design, build, and maintain UVM/SystemVerilog verification environments reusable across product lines.
• Define verification strategies, test plans, and coverage goals addressing protocol compliance, performance corner cases, and system integration.
• Develop constrained‑random, coverage‑driven tests targeting functional coverage closure and sign‑off quality.
• Debug complex issues across RTL logic, protocol state machines, timing, and testbench infrastructure using VCS or equivalent simulators.
• Collaborate with architecture, design, firmware, and systems teams to identify and resolve issues early.
• Mentor verification engineers on UVM methodology, coverage analysis, debugging techniques, and verification best practices.

Requirements

Must‑have skills and experience.

• Deep expertise in SystemVerilog and UVM with a record of building scalable verification environments.
• Strong protocol knowledge in at least one of PCIe, CXL, DDR, or Ethernet; ability to read specs and derive verification requirements.
• Proven experience with constrained‑random and coverage‑driven verification to achieve functional sign‑off.
• Solid debugging skills across RTL and verification infrastructure; experience with industry simulators such as VCS or ModelSim.
• Experience with verification IP development and assertion‑based verification.
• Nice to have: formal methods experience and familiarity with modern SoC architectures and high‑speed communication interfaces.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering or Computer Engineering.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.