Senior Staff Interface IP Verification Engineer — Pre-Silicon (PCIe/CXL/DDR/Ethernet)
SynopsysJob Title
Senior Staff Interface IP Verification Engineer — Pre-Silicon (PCIe/CXL/DDR/Ethernet)
Role Summary
Lead pre-silicon verification for interface IP including PCIe, CXL, DDR, and Ethernet. Responsible for verification strategy, building reusable UVM testbenches, and driving silicon signoff.
Work in a global verification team that collaborates with architecture, design, firmware, and systems engineering.
Experience Level
Senior — requires 8+ years of hands-on ASIC or SoC verification experience.
Responsibilities
Primary responsibilities include end-to-end verification, testbench development, and technical leadership.
- Own verification from architecture review through silicon signoff for interface IP (PCIe, CXL, DDR, Ethernet).
- Design and evolve UVM-based, reusable verification environments across product lines.
- Define verification strategies and test plans addressing protocol compliance, performance corner cases, and system-level scenarios.
- Develop constrained-random, coverage-driven test scenarios and drive functional coverage closure.
- Debug complex issues spanning RTL, timing, protocol state machines, and testbench infrastructure using VCS or equivalent simulators.
- Collaborate with architecture, design, firmware, and systems teams to identify and resolve issues early.
- Mentor verification engineers on UVM methodology, coverage analysis, debugging techniques, and verification best practices.
Requirements
Must-have technical skills and experience; nice-to-have items noted.
- Deep expertise in SystemVerilog and UVM with a track record of building scalable verification environments.
- Strong protocol knowledge in one or more of PCIe, CXL, DDR, or Ethernet and the ability to translate specs into verification requirements.
- Proven experience delivering constrained-random, coverage-driven verification solutions that achieve functional signoff.
- Solid debugging skills across RTL, verification infrastructure, and protocol compliance; experience with industry simulators (VCS, ModelSim, etc.).
- Experience with verification IP development and assertion-based verification.
- Nice-to-have: experience with formal methods and familiarity with modern SoC architectures and high-speed communication interfaces.
Education Requirements
Bachelor's or Master's degree in Electrical Engineering or Computer Engineering. The posting specifies 8+ years of hands-on ASIC/SoC verification experience.
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
