Job Title
Senior / Staff Interface IP Application Engineer
Role Summary
Senior/Staff engineer responsible for silicon validation, characterization, and application engineering for high-speed PHY and interface IPs. The role is cross-functional, coordinating analog and digital designers, silicon validation teams, and customer-facing engineers to ensure IPs meet real-world integration and performance targets.
Work includes creating validation plans, authoring and maintaining databooks, hands-on silicon bring-up and measurements, and supporting customer integrations and pre-sales technical engagements.
Experience Level
Senior-level. The posting specifies 8+ years of hands-on semiconductor engineering experience with significant involvement in silicon validation, PHY IP characterization, or interface IP application engineering.
Responsibilities
Primary duties focused on post-silicon validation, documentation, and customer support for high-speed PHYs.
- Develop and execute silicon validation plans for PHY IPs (UCIe, PCIe, USB, MIPI, etc.), including DC/AC characterization, jitter analysis, eye diagrams, and BER testing across PVT corners.
- Translate circuit-level design intent and calibration sequences into bring-up procedures and validation scripts; coordinate between analog/digital designers and validation teams.
- Support pre-sales technical engagements by presenting PHY capabilities and integration considerations; produce application notes with measured characterization data.
- Author and maintain PHY IP databooks: electrical specifications, register maps, timing diagrams, and integration guides based on silicon-measured performance.
- Perform hands-on silicon bring-up using oscilloscopes, BERTs, and signal-integrity tools to measure performance, triage anomalies, and drive root-cause analysis.
- Define and advocate for design-for-testability features (loopback modes, BIST, on-chip monitors) early in the design cycle.
- Correlate pre-silicon simulation with post-silicon measurements, identify model gaps, and work with design teams to improve future IP accuracy.
Requirements
Key must-have skills and experience; concise, practical expectations.
Must-have:
- 8+ years of hands-on semiconductor engineering experience with silicon validation, PHY IP characterization, or interface IP application engineering.
- Strong technical fundamentals across analog and digital domains; experience with high-speed mixed-signal PHY circuits (PLLs, SerDes, CDR, equalizers, digital interface controllers).
- Direct bench experience with silicon bring-up and characterization using oscilloscopes, BERTs, and signal-integrity measurement tools.
- Deep understanding of at least one major high-speed interface standard (UCIe, PCIe, USB, MIPI, LPDDR, BoW) including compliance test requirements.
- Proven experience writing or contributing to silicon validation plans, test procedures, characterization reports, or technical datasheets.
- Proficiency in validation scripting and automation (Python, MATLAB, or equivalent) for test automation and data analysis.
Nice-to-have:
- Experience with die-to-die interface IPs, advanced packaging characterization, or customer-facing application engineering roles.
Education Requirements
BS or MS in Electrical Engineering, Computer Engineering, or a related technical discipline.
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

Date Posted: 2026-06-09