Senior Staff Formal Verification Applications Engineer
SynopsysJob Title
Senior Staff Formal Verification Applications Engineer
Role Summary
Field-facing applications engineer responsible for deploying and optimizing formal verification (VC Formal) at customer sites. Work hands-on with customer design and verification teams to integrate formal into existing flows, debug performance and convergence issues, and translate field experience into product improvements.
Experience Level
Senior - typically 6+ years of hands-on formal verification experience.
Responsibilities
The role combines on-site consulting, technical problem solving, training, and product feedback.
- Lead deployment of formal verification methodology at customer sites and integrate tools into customer flows.
- Assess customer environments, identify high-impact blocks for formal analysis, and define success metrics.
- Diagnose and resolve tool performance and convergence problems by refining testbenches, assertions, and abstractions.
- Develop and deliver technical training and best-practice guidance on formal features and releases.
- Collaborate with Synopsys R&D and product engineering to relay customer needs and influence roadmap.
- Apply formal techniques across property checking, sequential equivalence checking, formal coverage, connectivity checks, and specialized applications.
- Serve as the technical bridge between customers and internal engineering, turning field problems into actionable product improvements.
Requirements
Must-have technical skills and field experience; nice-to-have items listed separately.
- Must-have: 6+ years of hands-on formal verification experience, including property checking, sequential equivalence checking, formal coverage, and connectivity checking.
- Must-have: Deep expertise with formal verification tools (VC Formal or equivalent) and strong understanding of SystemVerilog Assertions (SVA) and formal testbench modeling.
- Must-have: Proven ability to debug tool performance, analyze convergence issues, and optimize formal runs for large complex designs.
- Must-have: Experience in customer-facing roles (applications engineering, field engineering, or technical consulting) and working with cross-functional teams.
- Must-have: Solid grasp of RTL design, verification methodologies, and the semiconductor development lifecycle through tapeout.
- Nice-to-have: Prior experience directly influencing EDA product roadmaps or collaborating with R&D on feature development.
Education Requirements
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a closely related technical field - or equivalent practical experience.
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
