Senior/Staff Engineer — Post-Silicon Bring-up

Job Title

Senior/Staff Engineer — Post-Silicon Bring-up

Role Summary

Lead post-silicon bring-up and performance optimization for Cerebras's Wafer Scale Engine (WSE). Work cross-functionally with chip design, system performance, software, and product teams to deliver production-ready silicon and test infrastructure.

Experience Level

Senior. The role expects an experienced engineer with roughly 7–10+ years in industry and several years of pre-silicon and post-silicon ASIC work.

Responsibilities

Deliver end-to-end post-silicon bring-up, diagnostic infrastructure, and performance optimizations that are production-ready.

• Develop and debug bring-up flows and deployable optimizations for Wafer Scale Engines to reduce time and cost.
• Refine system behavior across hardware/software constraints (di/dt, V-F characterization, current/temperature limits) for performance tuning.
• Build and enhance infrastructure for real-world workload testing and large-scale automation.
• Design self-checking metrics, instrumentation, and coverage for silicon validation and debugging.
• Collaborate with architects, designers, performance engineers, and software teams to improve WSE performance.
• Work across Software, Design, Verification, Emulation, and Validation domains to optimize process and performance.
• Integrate with CI/CD, git-based workflows, and release processes (GitHub/Git actions, Jenkins) to streamline testing and releases.

Requirements

Must-have technical skills and experience; preferred items listed separately.

• 7–10+ years of industry experience, with 3–5 years in pre-silicon and post-silicon ASIC hardware work.
• Strong understanding of computer architecture and networking.
• Proficient coding skills in Python, Verilog/SystemVerilog, and C.
• Experience with hardware/software codesign and layered architectures.
• Proven debugging, analytical, and problem-solving skills for silicon bring-up.
• Experience with large-scale testing and automation (pytest, Python-based frameworks).
• Clear presentation and communication skills; ability to work cross-functionally and drive issues to closure.
• Nice-to-have: prior work on AI/ML systems with many-core CPU fabrics, in-line testing/diagnostics, knowledge of chip defect profiles and mitigation, and experience building large-scale test and software infrastructure.

Education Requirements

Bachelor's or Master's degree commonly expected: BS/BE/B.Tech or MS/M.Tech in Electrical Engineering, Electronics & Communication, Computer Science, or equivalent practical experience.

About the Company

Company: Cerebras

Headquarters: Sunnyvale, CA, USA

Developer of wafer-scale AI accelerators, Cerebras designs the Wafer Scale Engine (WSE)—one of the world’s largest AI chips—to deliver high-speed training and inference solutions for model labs, enterprises, and AI-native startups.