Job Title
Senior Staff Engineer - Physical Implementation Flow
Role Summary
Responsible for developing and maturing physical implementation flows and methodology for advanced technology nodes. The role works with functional design teams to optimize PCI/CXL/IDE controller IPs, define timing signoff criteria, and deliver robust place-and-route and signoff flows.
Position sits on the physical implementation team and focuses on timing closure, PPA optimization, and producing implementation guides and flows for customers and internal teams.
Experience Level
Senior-level. Typically requires 8+ years of relevant ASIC physical design and implementation experience.
Responsibilities
Key responsibilities include:
- Develop and improve physical implementation flows for advanced technology nodes.
- Collaborate with functional design teams to optimize and harden PCI/CXL/IDE controller IPs.
- Define timing signoff criteria and drive timing closure activities.
- Mature physical implementation guides and documentation for customers and internal teams.
- Participate in methodology development for next-generation physical design flows.
- Perform physical implementation tasks: synthesis, floor planning, PG grid design, place-and-route, CTS, STA, and power/signal-integrity signoff.
- Evaluate and improve PPA (area/speed/power) targets in collaboration with design teams.
Requirements
Must-have skills and experience:
- Extensive experience with ASIC design flow and hierarchical physical design strategies.
- Strong expertise in timing analysis, constraints management, and frontend synthesis.
- Experience with physical-aware synthesis, formality checks, and verification strategies.
- Experience with PrimePower-based power analysis and clock gating for power reduction.
- Practical knowledge of floor planning, PG grid creation and physical design using Synopsys tools.
- Strong physical implementation flow debugging skills and scripting (automation) abilities.
- 8+ years of relevant ASIC physical design/implementation experience.
Nice-to-have:
- Experience working on PCI/CXL/IDE controller IP or similar high-performance controller designs.
- Hands-on experience with the latest sub-micron technology issues and advanced node PnR techniques.
Education Requirements
Not specified.
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

Date Posted: 2026-07-29