Axelera AI logo

Senior/Staff Engineer - Logical Design

Axelera AI
August 11, 2026
Full-time
Remote
Europe (including United Kingdom)
RTL Design Jobs, Level - Senior

Job Title

Senior/Staff Engineer - Logical Design

Role Summary

Responsible for micro-architecture, RTL implementation and SoC integration of Axelera's in-house AI silicon products. The role focuses on achieving target performance, power and area (PPA) while improving design flows and ensuring design quality.

Work closely with architecture, verification, physical design and software teams to deliver production-ready RTL and validated silicon blocks.

Experience Level

Senior — minimum 5 years of experience in silicon logical design.

Responsibilities

Deliver and verify RTL-based digital blocks and integrate them into the top-level SoC; improve design quality and automation.

  • Collaborate with cross-functional teams to clarify and implement design specifications.
  • Architect and implement micro-architectures from high-level specifications, optimizing for performance, power and area (PPA).
  • Develop block- and system-level RTL and perform synthesis-ready coding.
  • Integrate 3rd-party IPs and sub-IP into the top-level SoC.
  • Run static checks (lint, CDC, equivalence) and address issues to improve RTL quality.
  • Automate tasks and flows using scripting for repeatability and efficiency.
  • Support functional verification efforts and collaborate with verification engineers to ensure correctness.
  • Participate in design reviews and collaborate with physical design engineers on DFM and DFT considerations.

Requirements

Key must-have skills and a few preferred skills.

  • Must-have: 5+ years of proven experience in silicon logical design, RTL coding and synthesis.
  • Fluent in Verilog.
  • Experience with SoC design and integrating 3rd-party IPs (e.g. PCIe, LPDDR).
  • Proficiency with industry-standard EDA tools for design and verification.
  • Deep understanding of digital design practices, including clock domain crossing (CDC), low-power techniques and timing closure.
  • Proficient scripting skills (Python, shell, Tcl) to automate flows.
  • Proven ability to work collaboratively across architecture, verification, physical design and software teams.
  • Strong analytical/problem-solving skills and excellent English communication.
  • Nice-to-have: experience with DFT/DFM flows, lint/equivalence toolchains, or prior work on AI accelerator silicon.

Education Requirements

A degree in electronics engineering, electrical engineering, computer science, or a related technical discipline.


About the Company

Company: Axelera AI

Headquarters: Eindhoven, Netherlands

Deep-tech startup developing a next-generation AI platform (Metis™) and AI accelerators/in-memory compute SoCs. The company has raised $120M, employs around 220 people across multiple countries, and operates European offices while focusing on high-performance AI hardware and software.

Axelera AI logo

Date Posted: 2026-08-10