Senior Staff Engineer, Diagnostics and AI

Job Title

Senior Staff Engineer, Diagnostics and AI

Role Summary

Lead architecture and R&D for silicon diagnostics, yield intelligence, and AI-enabled engineering workflows within Qualcomm's Yield Architecture and Engineering organization. Partner across Design, DFT, Product/Test Engineering, Failure Analysis, Yield, Automation, and AI teams to deliver production-quality diagnostic capabilities and scalable technical roadmaps.

Experience Level

Senior. Typical background: several years of ASIC/post-silicon engineering with responsibility for diagnostics, DFT, or yield systems; preferred candidates have extensive semiconductor experience (often 12+ years).

Responsibilities

Primary responsibilities include technical strategy, delivery, and cross-functional integration for diagnostics and yield intelligence.

• Define and evolve enterprise diagnostic architecture for scan, memory, and emerging observability capabilities.
• Drive reliable, scalable, production-quality scan and memory diagnostics across product lifecycles.
• Lead advanced R&D for diagnostics and yield-intelligence across advanced packaging, AI accelerators, and next-generation platforms.
• Architect and operationalize AI, analytics, automation, and agentic workflows that accelerate engineering decisions and preserve knowledge.
• Establish evidence models that convert silicon findings into actionable yield and design feedback.
• Frame and lead solutions for complex, ambiguous problems involving unclear ownership or data gaps.
• Create technical governance: roadmaps, milestones, reviews, metrics, risk management, and decision frameworks.
• Provide global technical direction in partnership with Bangalore leadership and enable local technical ownership.
• Mentor engineers, build technical communities, and promote reusable methods and documented architectures.

Requirements

Core technical skills and experience required to perform the role; education details are listed separately below.

• Proven experience in post-silicon/ASIC engineering, including diagnostics, silicon debug, test engineering, or yield analysis.
• Deep practical knowledge of scan and memory diagnostics, ATPG/DFT practices, and test-for-debug/test-for-yield workflows.
• Track record of defining technical strategy, architectures, and roadmaps across multiple teams or functions.
• Experience applying AI, analytics, automation, or data-platform solutions to engineering workflows or diagnostics problems.
• Systems and architecture mindset: design for reuse, scale, observability, and lifecycle learning.
• Demonstrated ability to influence cross-functional stakeholders and lead execution without direct authority.
• Experience building operational discipline: reviews, metrics, owners, and decision rights to enable predictable delivery.
• Strong written and verbal communication with the ability to present technical recommendations to senior technical leaders and executives.

Education Requirements

Minimum qualifications allow multiple academic paths: a Bachelor's in Science/Engineering or related field (baseline experience expectation), a Master's with reduced experience requirement, or a PhD with further reduced experience. Preferred fields include Electrical Engineering, Computer Engineering, Computer Science, Data Science, or related technical disciplines. The posting notes that equivalent practical experience in ASIC design, verification, validation, integration, or related work can satisfy these requirements.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.