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Senior Staff Engineer, Design Verification (Power & Analog ICs)

Renesas
November 2, 2026
Full-time
On-site
Bengaluru, Karnataka, India
Verification Jobs, Level - Senior

Job Title

Senior Staff Engineer, Design Verification (Power & Analog ICs)

Role Summary

Lead verification efforts for power-management and analog/mixed-signal SoC blocks and full-chip integrations. The role drives verification planning, environment architecture, and quality sign-off while coordinating cross-functional teams.

Experience Level

Senior - overall 12+ years of verification experience; expected to act as technical lead and mentor.

Responsibilities

Accountable for verification strategy, implementation, and closure across block, subsystem, and chip levels.

  • Define and own verification plans, methodologies, and coverage strategies for complex SoCs.
  • Architect and implement verification environments and extend existing frameworks.
  • Develop testbench components: agents, sequencers, drivers, monitors, scoreboards.
  • Integrate industry-standard VIP and develop custom transactors where needed.
  • Drive end-to-end verification: gate-level simulation and debug, regression runs, coverage analysis and closure, failure triage.
  • Convert verification tests to test patterns and support ATE vector bring-up activities.
  • Mentor junior and mid-level engineers and serve as technical owner for key deliverables.

Requirements

Must-have technical skills and practical experience.

  • 12+ years of verification experience using methodologies such as UVM.
  • Experience with industry-standard simulators, revision-control, and regression systems.
  • Proven ability to architect and execute full verification lifecycle for complex blocks and SoCs.
  • Strong RTL and gate-level debug skills and experience working with cross-functional teams to verify fixes.
  • Experience developing and maintaining verification testbenches, test cases, and automation.
  • Familiarity with mixed-signal designs and SoC architecture.
  • Knowledge of analog components: ADC, DAC, PLL, oscillators, and PI controllers.
  • Proficiency in SystemVerilog/UVM, Verilog, and familiarity with C/C++ and scripting (Python, Perl, Shell) for automation.
  • Experience with directed and constrained-random verification, coverage-driven verification, and regression management.
  • Strong analytical, problem-solving, and communication skills; experience mentoring/leading engineering teams.

Education Requirements

Bachelor's degree in Electrical Engineering or equivalent practical experience.


About the Company

Company: Renesas

Headquarters: Hitachinaka, Japan

Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.

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Date Posted: 2026-10-27