Senior Staff Engineer, Design Verification
Marvell TechnologyJob Title
Senior Staff Engineer, Design Verification
Role Summary
SoC-level design verification engineer responsible for developing and maintaining UVM testbench components and verification collateral for complex SoC architectures. You will join the Custom Silicon Engineering team working on high-performance compute, network processing, and storage applications.
The role focuses on creating test plans and verification environments, developing tests to meet coverage goals, debugging failures, and collaborating with designers to resolve issues.
Experience Level
Senior — requires substantial prior verification experience. Typical guidance from the posting: Bachelor's degree plus 4+ years of relevant experience, or Master's/PhD with 3+ years.
Responsibilities
Primary responsibilities include planning and executing SoC verification activities and maintaining verification environments.
- Analyze architectures and designs to create comprehensive test plans and verification strategies.
- Develop and maintain UVM-based verification environments and testbench components.
- Create and run directed and constrained-random tests to meet coverage goals.
- Debug test failures and work with designers to identify and fix design issues.
- Contribute to verification automation and regression frameworks.
- Participate in code and test reviews to ensure verification quality.
Requirements
Core technical skills and other role requirements. Degree and field details are summarized separately under Education Requirements.
- Must-have: Experience with Verilog and SystemVerilog; familiarity with UVM-based verification methodologies.
- Must-have: Proficiency with scripting languages such as Python or Perl for testbench automation.
- Must-have: Working knowledge of Linux and basic proficiency in C/C++.
- Must-have: Practical SoC-level verification experience, including developing tests and achieving coverage goals.
- Nice-to-have: Experience with industry protocols such as CXL, PCIe, or Ethernet and familiarity with ARM-based designs.
- Ability to debug complex interactions across subsystems and collaborate with cross-functional design teams.
- Must be eligible to access export-controlled information as required by U.S. export control laws; candidates may be subject to export license review prior to employment.
- Interview integrity policy: use of AI tools during interviews is prohibited and may lead to disqualification.
Education Requirements
Bachelor's degree in Computer Science, Electrical Engineering, or a related field with 4+ years of relevant professional experience; or a Master's degree or PhD in Computer Science, Electrical Engineering, or a related field with 3+ years of experience. (Degree plus specified years of experience as stated in the posting.)
About the Company
Company: Marvell Technology
Headquarters: Santa Clara, California, United States
Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.
