Senior Staff Engineer, Design Verification
SoC-level design verification engineer responsible for development and maintenance of UVM testbench components and verification collateral. Member of the Custom Compute, Storage and Automotive Business Unit working on high-performance compute, server, network, storage and automotive SoC architectures.
Senior — typically 5+ years of relevant experience. (Posting examples: Bachelor’s +5–10 years, Master’s/PhD +3–5 years.)
Primary responsibilities include creating verification plans, building test environments, and driving closure of verification issues across complex SoCs.
Must-have technical skills and constraints.
Bachelor’s degree in Computer Science, Electrical Engineering, or related field (typical experience: 5–10 years), or Master’s degree or PhD in Computer Science, Electrical Engineering, or related field (typical experience: 3–5 years). Equivalent practical experience may be considered where stated.
Company: Marvell Technology
Headquarters: Santa Clara, California, United States
Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.
