Senior Staff Engineer, Analog and Mixed-Signal Circuit Design

Job Title

Senior Staff Engineer, Analog and Mixed-Signal Circuit Design

Role Summary

Lead a local schematic design team in Ottawa developing high-speed analog and mixed-signal circuits for memory PHY IP (DDR, LPDDR, HBM, Mobile Storage). Provide technical direction, define circuit architectures, and ensure designs meet power, area, performance, and reliability targets for advanced process nodes.

Experience Level

Senior-level. This is a leadership individual-contributor role that requires substantial hands-on analog IC design experience; see Education Requirements for degree and years guidance.

Responsibilities

Key day-to-day responsibilities include:

• Provide technical leadership and direction for a local schematic design team working on DDR, LPDDR, HBM, and Mobile Storage PHY circuits.
• Design and optimize high-speed analog/mixed-signal blocks: receive equalizers, samplers, voltage/current-mode drivers, serializers/deserializers, VCOs, PLLs/DLLs, bandgaps, ADCs/DACs.
• Identify and refine circuit architectures to meet aggressive power, area, and performance targets in advanced FinFET nodes.
• Develop simulation and verification strategies (SPICE, Verilog-A models, scripting) for corner coverage, Monte Carlo, and aging analyses.
• Collaborate with layout engineers to minimize parasitics, manage device stress, and incorporate process variation into physical implementation.
• Present simulation results, trade-off analyses, and design reviews to internal teams and customers.
• Document specifications, test plans, and circuit features for IP releases and customer engagements.

Requirements

Must-have technical skills and experience; nice-to-have items noted separately.

• Extensive transistor-level analog circuit design experience with multiple tape-outs.
• Detailed design experience with at least one — and familiarity with several — DDR or SerDes sub-circuits (equalizers, samplers, drivers, serializers/deserializers, VCOs, PLLs/DLLs, bandgaps, ADCs/DACs).
• Proficiency with SPICE simulators and simulation methodologies for corner analysis, Monte Carlo, and aging.
• Working knowledge of ESD techniques, layout considerations, and design-for-reliability (electromigration, IR drop, aging).
• Experience with schematic entry, physical layout tools, and design verification flows in advanced process nodes.
• Ability to present clear simulation data, explain circuit trade-offs to layout and digital teams, and drive decisions that reduce iterations.
• Practical scripting skills for simulation setup and post-processing (TCL, Python, Verilog-A) are expected.
• Nice-to-have: Hands-on FinFET experience and physical layout experience for high-speed circuits.

Education Requirements

PhD with 5+ years of hands-on analog IC design experience, or Master's with 8+ years of hands-on analog IC design experience. Multiple tape-outs and a strong CMOS fundamentals background are expected. (No equivalent-experience language was specified.)

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.