Senior Staff Digital Verification Engineer - Memory Interface IP (HBM/DDR/LPDDR)
SynopsysJob Title
Senior Staff Digital Verification Engineer - Memory Interface IP (HBM/DDR/LPDDR)
Role Summary
Lead verification engineering for memory interface IP (HBM, DDR, LPDDR) delivering production-quality verification environments, coverage-driven test plans, and reusable verification IP. Work with design and architecture teams to find and close hard protocol and timing issues before tapeout.
Experience Level
Senior-level. Typical experience: 6–8+ years of ASIC/SoC verification engineering.
Responsibilities
Key duties include building verification infrastructure, ensuring protocol compliance, and mentoring engineering staff.
- Design and implement verification environments for Interface IP (HBM, DDR, LPDDR, AMBA) using SystemVerilog and UVM.
- Author detailed test plans covering functional scenarios, corner cases, and protocol compliance for memory controllers and interface IP.
- Develop reusable verification IP and testbenches for multi-project reuse and variant support.
- Collaborate with design and architecture teams to identify bugs, clarify specs, and close coverage gaps prior to tapeout.
- Run functional coverage analysis, track metrics, and drive coverage closure across complex multi-protocol environments.
- Mentor junior verification engineers on UVM best practices, debugging, and verification strategy.
- Use simulators (VCS, ModelSim, Xcelium or equivalent) to execute regressions, debug failures, and validate fixes.
Requirements
Must-have technical skills and practical experience.
- Proven experience verifying Interface IP protocols such as HBM, DDR, LPDDR, or AMBA in production designs.
- Strong proficiency in SystemVerilog and UVM, including testbench architecture, assertions, and VIP development.
- Deep understanding of digital design, timing, protocol compliance, and memory subsystem architecture.
- Experience using simulation tools such as VCS, ModelSim, Xcelium, or equivalent in regression and debug workflows.
- Demonstrated ability to drive functional coverage closure and deliver verified IP on schedule.
- Nice-to-have: hands-on experience with HBM2/HBM3, DDR4/DDR5, LPDDR4/LPDDR5.
Education Requirements
Bachelor's or Master's degree in Electrical Engineering or Computer Engineering.
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
