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Senior Staff Digital Design Engineer

Marvell Technology
June 10, 2026
Full-time
On-site
Irvine, California, United States
$135,900 - $201,130 USD yearly
RTL Design Jobs, Level - Senior

Job Title

Senior Staff Digital Design Engineer

Role Summary

Senior-level digital IC design engineer on the Connectivity business group working on digital IP for data center and AI infrastructure. The role leads RTL design and implementation for major sub-circuit blocks, collaborates with synthesis and physical design teams, and supports silicon validation.

Experience Level

Senior (senior staff level).

Responsibilities

Primary hands-on and leadership responsibilities include:

  • Design and implement synthesizable RTL (Verilog/SystemVerilog) for digital IP blocks and subsystems.
  • Translate architectural specifications into clean RTL and ensure design quality through linting, CDC, and low-power checks.
  • Perform timing, area, and power trade-off analysis during implementation and support synthesis runs.
  • Work with physical design teams on timing closure and resolve timing-related issues.
  • Debug functional issues across simulation, emulation, FPGA prototyping, and silicon bring-up.
  • Lead definition and tuning of at least one major sub-circuit block; propose design improvements and drive root-cause investigations.
  • Mentor and coach less experienced engineers on the team.

Requirements

Key qualifications and skills.

  • Must-have: Strong RTL development skills in Verilog/SystemVerilog and practical experience supporting synthesis and physical design integration.
  • Must-have: Proven experience as the responsible engineer for at least one major sub-circuit block, including architecture-to-silicon delivery and optimization across process, voltage, and temperature (PVT).
  • Must-have: Experience with timing analysis, area/power trade-offs, and silicon validation (model-to-hardware correlation, root-cause analysis).
  • Must-have: Ability to debug across simulation, emulation, FPGA prototypes, and silicon bring-up; collaborate effectively with cross-functional teams.
  • Must-have: Experience mentoring junior engineers and leading a technical workstream.
  • Must-have: Eligible to access export-controlled technology; hiring may require export license review for non-U.S. citizens.
  • Nice-to-have: Knowledge of communication and DSP algorithms.
  • Nice-to-have: Verification experience, UVM preferred.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a similar technical field. Degrees in mathematics, physics, or other sciences may be considered if supplemented by relevant electronics coursework or equivalent practical experience.


About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.

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Date Posted: 2026-06-11