Senior Staff Design Verification Engineer
SoC-level design verification engineer responsible for developing and maintaining UVM testbench components and verification collateral for complex SoC architectures within the Custom Compute, Storage and Automotive business unit. Focus is on ensuring functional quality across compute, storage and networking subsystems.
Senior — typically aligned with the listed degree-and-experience guidance (see Education Requirements).
Primary responsibilities include:
Must-have technical skills and experience:
Nice-to-have:
Bachelor's degree in Computer Science, Electrical Engineering or a related field with 5–10 years of related professional experience; or a Master's degree and/or PhD in Computer Science, Electrical Engineering or related fields with 3–5 years of experience.
Company: Marvell Technology
Headquarters: Santa Clara, California, United States
Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.
