Senior Staff ASIC Verification Engineer
SynopsysJob Title
Senior Staff ASIC Verification Engineer
Role Summary
Lead verification for DDR PHY and memory-subsystem IP, owning verification strategy, testplan definition, and reusable UVM environments. Work closely with design engineers to find and root-cause RTL and gate-level issues before tape-out.
Mentor junior verification engineers and integrate automation and AI-assisted tools into the verification flow to improve coverage and debug efficiency.
Experience Level
Senior-level - requires 8+ years of hands-on ASIC verification experience.
Responsibilities
You will define and execute verification plans and build reusable verification infrastructure for memory IP.
- Define and track verification test plans for DDR PHY and memory subsystem IP.
- Design and implement constrained-random SystemVerilog testbenches using UVM.
- Write SystemVerilog assertions and functional coverage models; drive coverage closure.
- Debug RTL and gate-level simulation failures and work with designers to root-cause issues.
- Perform code coverage analysis and identify untested paths and corner cases.
- Mentor and review work of junior verification engineers; improve team debugging practices.
- Integrate AI-assisted verification tools and automation into verification workflows.
Requirements
Key technical skills and experience required or strongly preferred.
- Must-have: Deep proficiency with UVM methodology and SystemVerilog for testbench and assertion development.
- Must-have: Proven RTL and gate-level debugging skills on complex memory interfaces.
- Must-have: Strong scripting ability in Perl or Python for automation and result parsing.
- Must-have: Experience defining verification test plans, functional coverage, and driving coverage closure.
- Nice-to-have: Understanding of DDR memory architecture, PHY design, timing, training, and calibration flows.
- Nice-to-have: Knowledge of DFI protocol, memory controllers, or memory subsystem integration.
- Nice-to-have: Experience with AI-assisted verification tools and workflows.
- Nice-to-have: Demonstrated mentorship and technical leadership in verification teams.
Education Requirements
Bachelor's degree in Electrical Engineering or Computer Engineering is stated as required; the posting specifies 8+ years of hands-on ASIC verification experience. (No alternate degree fields or explicit equivalent-experience language provided.)
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
