Senior Staff ASIC Digital Verification Engineer

Job Title

Senior Staff ASIC Digital Verification Engineer

Role Summary

Lead verification of complex security IP subsystems (cryptographic cores, RNGs, interfaces, memories) as part of Synopsys' Security IP group in Eindhoven. The role focuses on defining verification strategies, building maintainable UVM/formal environments, and ensuring correctness through to tape-out.

Experience Level

Senior-level. The posting indicates 6+ years of hands-on digital verification experience.

Responsibilities

Design and execute verification activities for security-focused IP and subsystems; collaborate with design and architecture teams to root-cause defects and improve quality.

• Define and implement verification strategies for complex security IP subsystems.
• Build and maintain UVM testbenches, assertion-based environments, and formal flows.
• Create test plans, test specifications, and coverage models mapped to product requirements.
• Automate regression environments and continuous verification using scripting (Python/Perl/TCL).
• Run verification in simulators and on FPGA platforms; debug RTL and testbench failures.
• Apply formal techniques to prove properties and corner cases not reachable by simulation.
• Support hardware-software integration verification for embedded software and drivers.

Requirements

Key technical skills and experience required or strongly preferred.

• Must-have: Proven track record verifying digital hardware IP through multiple tape-outs or product releases.
• Must-have: Deep expertise in SystemVerilog, UVM, assertion-based verification, and coverage-driven methodology.
• Must-have: Experience with formal verification techniques and building formal flows.
• Must-have: Strong understanding of IC design flows, RTL design principles, and verification-implementation handoff.
• Must-have: Experience automating verification and regression using scripting languages (Python, Perl, TCL).
• Must-have: Practical experience debugging RTL and testbench issues; running tests on emulation/FPGA platforms.
• Nice-to-have: Knowledge of security protocols, cryptographic algorithms, or embedded security verification approaches.
• Nice-to-have: Experience with IP synthesis flows and verifying timing/synthesis constraints.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering or Computer Science. The posting specifies this degree expectation together with 6+ years of hands-on verification experience.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.