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Senior STA / Timing Constraints Engineer

Advanced Micro Devices
September 02, 2026
Full-time
On-site
Bengaluru, Karnataka, India
Physical Design Jobs, Level - Senior

Job Title

Senior STA / Timing Constraints Engineer

Role Summary

Work on static timing analysis (STA) and timing constraints for IP, subsystem, and full-chip designs within the physical implementation flow. Support timing signoff, constraint development, pre-route timing checks, and ECO-driven timing closure for high-frequency designs.

Experience Level

Senior-level; typically 5+ years of relevant experience in timing constraints and STA for ASIC/SoC designs.

Responsibilities

Primary responsibilities include:

  • Develop multi-mode / multi-corner SDC timing constraints compatible with RTL and signoff flows.
  • Ensure constraints quality using industry tools and run pre-route timing checks and QoR cleanup to prepare for STA.
  • Drive timing closure for sub-chip/subsystem or full-chip, including interface timing and DRV closure.
  • Generate timing ECOs using tools such as DMSA/Tweaker and lead ECO implementation to close timing gaps.
  • Analyze timing reports to identify both design and constraints-related issues and implement fixes.
  • Collaborate with physical design, verification, and DFT teams during signoff and handoff.
  • Develop and maintain Tcl/Linux scripts to automate timing flows and EDA tool interactions.

Requirements

Must-have and preferred technical skills:

  • Must-have: Strong TCL/scripting skills and experience in Linux-based EDA environments.
  • Must-have: Practical experience with STA methodology, corner definitions, SDC constraints, and timing signoff (OCV/AOCV/POCV analysis).
  • Must-have: Experience performing timing closure and analyzing timing reports for high-frequency blocks and subsystems.
  • Preferred: Experience with Synopsys Design Compiler / PrimeTime, Spyglass, Fishtail, Tweaker, DMSA or similar EDA tools.
  • Preferred: Understanding of physical design flow, ECO implementation, and DFT mode requirements for timing signoff.
  • Preferred: Experience in flat and hierarchical implementation flows and working on full-chip timing closure.

Education Requirements

Bachelor's or Master's degree in Computer Engineering or Electrical Engineering.


About the Company

Company: Advanced Micro Devices

Headquarters: Sunnyvale, California, USA

Advanced Micro Devices, or AMD, is a global semiconductor company that designs and manufactures microprocessors, graphics processors, and related technologies for a variety of computing devices. Known for pushing the boundaries of innovation, AMD's mission is to deliver high-performance computing solutions for AI, data centers, gaming, and embedded applications. They foster a collaborative, inclusive culture focused on creativity and problem-solving, aiming to drive progress and excellence in technology.

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Date Posted: 2026-09-01