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Senior Software R&D Engineer, ECO Route - VLSI EDA

NVIDIA
September 01, 2026
Full-time
On-site
Santa Clara, California, United States
$168,000 - $310,500 USD yearly
EDA Jobs, Level - Senior

Job Title

Senior Software R&D Engineer, ECO Route - VLSI EDA

Role Summary

Develop detailed physical-design algorithms for ECO routing and physical optimization within NVIDIA's VLSI EDA team. Work covers incremental logic synthesis, metal ECOs, precision clock-tree tuning, routing-aware optimization, and cross-domain tools that integrate timing, power, placement, and DRC constraints.

The role spans algorithm invention through implementation, validation, and production deployment for high-performance silicon design flows.

Experience Level

Senior-level. The role expects 5+ years of relevant experience.

Responsibilities

Deliver research and production-quality software for ECO routing and related physical-design problems.

  • Develop incremental physical-design technology to rapidly implement high-performance logic changes with DRC and parasitic awareness, for both all-layer and metal-only ECOs.
  • Invent and implement detailed-routing algorithms addressing discrete and continuous optimization challenges from modern DRCs, including pin access and route optimization.
  • Design cross-domain optimization tools that consider logic, timing, clocks, testability, power distribution, placement, and routing together.
  • Own problems end-to-end: algorithm research, software design, implementation, validation, and production deployment.

Requirements

Core qualifications and authorizations required for the role.

  • 5+ years of relevant EDA or physical-design software engineering experience.
  • Strong C++ expertise and experience with high-performance software architecture, algorithms, complexity analysis, data structures, and memory-efficient implementations.
  • Deep knowledge of detailed routing, advanced design rules, pin access, route optimization, and DRC-aware implementation.
  • Familiarity with systems typically co-optimized with ECOs, such as clock distribution, DFT, and power delivery.
  • Authorization to work on export-controlled data arising in CPUs, GPUs, LPUs, or communication networks.
  • Proven ability to take algorithmic problems from invention through production deployment and validation.

Nice-to-have:

  • Experience with logic and physical co-optimization, technology mapping, or SAT-based techniques.
  • Experience in placement, legalization, or IR-drop reduction.
  • Experience applying machine-learning techniques (LLMs, reinforcement learning, GNNs) to physical design or combinatorial optimization.

Education Requirements

MS or PhD, or equivalent practical experience; the posting specifies 5+ years of relevant experience. The source did not mandate specific fields of study.


About the Company

Company: NVIDIA

Headquarters: Santa Clara, California, USA

NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.

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Date Posted: 2026-08-31