Senior SoC Verification Engineer – SystemVerilog/UVM

Job Title

Senior SoC Verification Engineer – SystemVerilog/UVM

Role Summary

Work on SoC verification using SystemVerilog and UVM to develop and maintain verification environments and testbenches for automotive/industrial-grade designs. Create C tests and Python scripts for test automation, coverage analysis, and regression flows.

Collaborate with RTL, architecture and firmware teams to define verification strategies, close coverage, and ensure product quality in EDA-driven simulation environments.

Experience Level

Senior-level. Preferred 5–8 years of relevant digital/SoC verification experience.

Responsibilities

The role focuses on building verification infrastructure and executing verification plans for SoC blocks and integrations.

• Design and implement SystemVerilog/UVM testbenches and verification components.
• Develop C-based tests for firmware-level verification and integration scenarios.
• Write Python scripts for automation, regression management, coverage collection and analysis.
• Work with RTL, architecture and firmware teams to define verification strategies and requirements.
• Drive coverage closure, debug simulation failures, and triage issues to RTL/firmware owners.
• Use EDA tools and simulation flows to run regressions and analyse results.
• Support verification planning for automotive/industrial quality targets.

Requirements

Required technical skills and experience.

Must-have

• Strong experience with SystemVerilog and UVM for testbench development.
• Practical experience developing tests in C for verification purposes.
• Proficiency with Python for automation, data analysis and coverage scripting.
• Hands-on experience with EDA tools, simulators and standard verification flows.
• Proven track record in SoC or complex block-level verification and debugging.

Nice-to-have

• Experience in automotive or industrial verification environments and relevant quality/process standards.
• Previous collaboration with RTL, architecture and firmware teams on verification strategy.

Education Requirements

Background in Electronic Engineering or Computer Science is required. Degree level is not specified in the source.

About the Company

Company: STMicroelectronics

Headquarters: Geneva, Switzerland

Global semiconductor company that designs, develops and manufactures a broad range of semiconductor integrated circuits and discrete devices for automotive, industrial, personal electronics and communications markets. Offers microcontrollers, sensors, power management, analog and mixed-signal solutions and related software and services.