Senior SoC Verification Engineer – SystemVerilog/UVM

Job Title

Senior SoC Verification Engineer – SystemVerilog/UVM

Role Summary

Develop and maintain SystemVerilog/UVM testbenches and verification environments for SoC projects. Collaborate with RTL, architecture and firmware teams to define verification strategies and ensure functional quality for automotive and industrial products.

Deliverables include constrained-random and directed tests, C-based tests for firmware interactions, Python automation and coverage analysis to achieve closure.

Experience Level

Senior — typically 5–8 years of relevant SoC verification experience.

Responsibilities

Primary duties include designing and executing verification plans and automation for SoC subsystems.

• Design and implement SystemVerilog/UVM testbenches and verification components.
• Create and maintain C-based tests for firmware/hardware interaction scenarios.
• Develop Python scripts for automation, data analysis and coverage processing.
• Build and run regression suites, collect functional and code coverage, and drive closure activities.
• Debug functional failures and work with RTL, architecture and firmware teams to resolve issues.
• Define verification strategy and quality criteria for automotive/industrial environments.
• Use EDA simulators, coverage tools and debug tools as part of the verification flow.

Requirements

Must-have technical skills for immediate contribution; preferred items listed separately.

• Proven hands-on experience with SystemVerilog and UVM for SoC or complex IP verification.
• Experience writing tests in C to validate firmware/hardware interactions.
• Proficient in Python scripting for test automation and coverage analysis.
• Practical experience with EDA simulators, coverage tools and verification debug workflows.
• Ability to collaborate with cross-functional teams (RTL, architecture, firmware) to define and execute verification strategy.

Nice-to-have:

• Experience with automotive standards and qualification (for example ISO 26262).
• Familiarity with emulation, formal methods or hardware-assisted verification.
• Experience leading or mentoring verification engineers.

Education Requirements

Bachelor's degree in Electronic Engineering, Computer Engineering, Computer Science or a related technical field, or equivalent practical experience.

About the Company

Company: STMicroelectronics

Headquarters: Geneva, Switzerland

Global semiconductor company that designs, develops and manufactures a broad range of semiconductor integrated circuits and discrete devices for automotive, industrial, personal electronics and communications markets. Offers microcontrollers, sensors, power management, analog and mixed-signal solutions and related software and services.