Senior SoC Physical Design Engineer

Job Title

Senior SoC Physical Design Engineer

Role Summary

Responsible for leading SoC physical implementation activities for high-complexity designs. The role drives implementation processes, resolves novel technical issues, and influences architecture and delivery decisions across the SoC implementation flow.

Experience Level

Senior — title indicates a senior-level role (typically 7+ years of relevant experience).

Responsibilities

Primary responsibilities include technical leadership in physical design, ownership of implementation quality, and mentoring of junior engineers.

• Lead and own SoC implementation processes and deliverables for complex, multi-million-gate designs.
• Analyze and solve complex, novel problems; introduce and implement process or method improvements.
• Influence technical decisions that affect final product timing, power, and manufacturability.
• Drive floorplanning, power planning, and physical design trade-offs with cross-functional teams.
• Oversee clock tree synthesis (CTS) and static timing closure activities.
• Validate constraints and assist formal verification and DFT/SCAN integration activities.
• Perform electrical analysis: IR-drop, electromigration (EM), and signal/noise assessments.
• Coordinate physical verification and signoff checks to meet tapeout requirements.
• Coach and mentor less experienced staff; present status and technical findings to stakeholders.

Requirements

Must-have technical skills and experience for successful performance in this role.

• Deep SoC implementation expertise and experience with multi-million-gate integration.
• Hands-on experience in low-power implementation and constraints validation.
• Familiarity with formal verification flows and their interaction with physical implementation.
• Strong experience in floorplanning and power planning for complex SoCs.
• Proven experience with Clock Tree Synthesis (CTS) and clocking strategies.
• Working knowledge of synthesis flows, SCAN, and DFT implementation considerations.
• Proficiency in static timing analysis (STA) and timing closure methodologies.
• Experience with IR-drop, EM, and noise analysis and mitigation techniques.
• Experience with physical verification and signoff flows.
• Proficiency in scripting for automation of flows and analysis; strong communication and presentation skills.

Education Requirements

Bachelor's or Master's degree in Electronics Engineering or Electrical Engineering is specified.

About the Company

Company: Advanced Micro Devices

Headquarters: Sunnyvale, California, USA

Advanced Micro Devices, or AMD, is a global semiconductor company that designs and manufactures microprocessors, graphics processors, and related technologies for a variety of computing devices. Known for pushing the boundaries of innovation, AMD's mission is to deliver high-performance computing solutions for AI, data centers, gaming, and embedded applications. They foster a collaborative, inclusive culture focused on creativity and problem-solving, aiming to drive progress and excellence in technology.