Job Title
Senior SoC Network Subsystem Architect
Role Summary
Design and lead the end-to-end architecture of high-performance network subsystems for next-generation IPU/DPU platforms within Intel's Networking Architecture Group (NAG). The role covers packet processing pipelines, protocol engines, QoS frameworks, telemetry, and cross-functional coordination across hardware, software, and systems teams.
Responsible for defining scalable, programmable networking pipelines and a multi-generation NSS roadmap for hyperscale data centers and cloud workloads.
Experience Level
Senior β requires 7+ years of relevant experience in networking ASIC/SoC/IPU/DPU architecture and system-level architecture.
Responsibilities
Key responsibilities include:
- Own and define end-to-end Network Subsystem (NSS) architecture, including packet processing pipelines, protocol engines, and interface datapaths.
- Architect high-performance packet pipelines supporting hundreds of millions of packets/sec and large numbers of flows.
- Drive architectural direction for programmable vs. fixed-function pipeline balance and future extensibility.
- Specify pipeline scaling strategies, partitioning, feature scalability, and backward compatibility across generations.
- Architect QoS, scheduling frameworks, traffic class isolation, and flow management for multi-tenant and virtualized environments.
- Define telemetry, performance counters, debug and observability mechanisms to support field triage and large-scale monitoring.
- Collaborate with SoC, compute, memory, SW/FW, validation, and customer teams; lead architectural reviews and influence cross-team technical direction.
Expected behavioral traits: strategic thinking, technical leadership, structured problem solving, collaboration, customer focus, adaptability, and ownership.
Requirements
Must-have technical skills and experience:
- Deep experience with networking ASIC/SoC/IPU/DPU architecture.
- Expertise in high-speed packet processing pipelines and system-level architecture tradeoffs.
- Experience defining architecture for large-scale data center networking systems.
- Proven ability to lead cross-functional architecture decisions and engage with external customers.
Nice-to-have:
- Experience with programmable datapath architectures (P4, pipeline microcode, or hybrid models).
- Experience with AI/HPC scale-out networking, congestion control, or transport protocol offloads.
- Familiarity with coherent or shared-memory offload models and hyperscaler deployment or customer co-design engagements.
Education Requirements
Bachelor's degree in Electrical/Computer Engineering, Computer Science, or a related field, plus 7+ years of relevant experience (as stated in the source posting).
About the Company
Company: Intel Corporation
Headquarters: Santa Clara, California, USA
Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.

Date Posted: 2026-06-11