Senior Silicon Validation Methodology Engineer
NVIDIAJob Title
Senior Silicon Validation Methodology Engineer
Role Summary
The Senior Silicon Validation Methodology Engineer owns low-power (LPWR) validation methodology across GPU, SoC, and CPU products, from architecture through silicon to product. This role defines validation strategy, establishes department-wide standards, and ensures reuse of methods across multiple silicon products.
The position works cross-functionally with Architecture, Design, Firmware, and Software teams to translate product goals into methodology, infrastructure, and tooling investments, and to improve validation workflows at department scale.
Experience Level
Senior - typically requires 8+ years of hands-on silicon validation methodology experience focused on low-power architecture and design.
Responsibilities
Key responsibilities include establishing and operationalizing LPWR validation across products and driving department-level methodology and tooling.
- Own architecture, design, and first-use of end-to-end LPWR validation methodology from silicon to product, covering corners, edge conditions, variability, and real-world scenarios.
- Define test scope, coverage bounds, PVT/variability strategies, signoff criteria, milestone playbooks, and schedule vs test-time trade-offs.
- Invent and deploy new LPWR validation approaches, tools, and metrics that become organization defaults.
- Set multi-generation LPWR validation strategy and policy, including long-lead infrastructure and tooling investments.
- Drive cross-functional consensus across Architecture, Design, Firmware, and Software under competing PPA, coverage, and schedule constraints.
- Improve validation workflows via automation, coverage metrics, pre-silicon to post-silicon correlation, and AI-enabled analysis; fold learnings back into methodology and design.
Requirements
Required skills and experience for successful performance in this role.
- 8+ years of hands-on silicon validation methodology experience with deep ownership of low-power architecture and design (idle power, power gating, clocking, DVFS, and related features).
- Proven record of creating LPWR validation methods, tools, or signoff criteria adopted across multiple products or teams.
- Expert debugging of silicon LPWR issues and the ability to decompose ambiguous failures into reusable validation and corrective approaches.
- Demonstrated ability to set validation strategy under hard trade-offs (functionality vs. performance/power, latency vs. coverage, coverage vs. schedule).
- Strong collaboration and leadership skills with experience influencing cross-functional groups (design, board, firmware, software) through product launches.
- Practical experience applying AI-enabled techniques to accelerate analysis, exploration, and documentation while maintaining technical rigor and judgment.
- Nice-to-have: Experience setting LPWR validation policy or playbooks that other teams adopted independently.
- Nice-to-have: Evidence of shipped methodology reuse across multiple chips or platforms with measurable impact (higher coverage, fewer debug loops, faster bring-up).
Education Requirements
Master's or Bachelor's degree in Electrical Engineering or Computer Engineering, or equivalent practical experience.
About the Company
Company: NVIDIA
Headquarters: Santa Clara, California, USA
NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.
