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Senior Silicon Manufacturing Methodology Engineer

NVIDIA
September 06, 2026
Full-time
On-site
Shanghai, China
Test Engineering Jobs, Level - Senior

Job Title

Senior Silicon Manufacturing Methodology Engineer

Role Summary

Join the Silicon Co-Design Group (SCG) to define and implement validation and screening methods for new silicon features in high-volume manufacturing. The role drives manufacturing test strategy, DFP (Design for Productization) methodology, and production readiness across cross-functional teams.

This is a hands-on, highly visible position focused on creating reusable test methods, analytics, and AI-assisted workflows that ensure yield, quality, and scalable production for complex SoCs and GPUs.

Experience Level

Senior β€” typically requires 8+ years of experience in post-silicon validation and/or high-volume manufacturing test for SoCs, GPUs, CPUs, or similar complex silicon.

Responsibilities

Own and execute manufacturing methodology and DFP activities that move products from design into reliable, scalable production.

  • Define organization-wide manufacturing test strategy, standards, and sign-off criteria.
  • Translate system specifications and product POR into test content, coverage, flows, and testability requirements.
  • Maintain DFP roadmaps across infrastructure planning, execution readiness, and production sign-off.
  • Partner with cross-functional teams to implement test content, debug hooks, screening improvements, and binning strategies.
  • Investigate yield, coverage, and correlation issues; produce hypothesis trees, measurement plans, and closure paths.
  • Define data and analytics frameworks for yield analysis, anomaly detection, and continuous improvement.
  • Create production-standard test methods, analytics systems, and debug frameworks for reuse across products.
  • Develop secure, traceable AI-assisted workflows for analysis, debug, documentation, and methodology automation with human oversight.

Requirements

Required technical skills and proven track record relevant to manufacturing test and post-silicon validation.

  • 8+ years in post-silicon validation and/or high-volume manufacturing test for complex SoCs, GPUs, CPUs, or similar.
  • Hands-on experience with test content bring-up, limit setting, correlation to characterization, and yield/coverage optimization.
  • Ownership of manufacturing test strategy from early planning through ramp to QS/production.
  • Proficiency with scripting and data analysis (examples: Python, MATLAB, R, SQL) for test data analytics, limit tuning, and yield/debug analysis.
  • Ability to structure ambiguous manufacturing problems, define evidence-driven trade-offs, and drive cross-functional alignment to closure.
  • Strong written and verbal communication; experience authoring structured technical documents and test plans for global teams.
  • Experience applying AI to accelerate analysis and documentation while maintaining validation guardrails and engineering judgment.
  • Proven record creating reusable test methods, analytics frameworks, or debug tools adopted across teams or products.

Education Requirements

BS or MS in Electrical Engineering, Computer Engineering, or a related technical field β€” or equivalent practical experience.


About the Company

Company: NVIDIA

Headquarters: Santa Clara, California, USA

NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.

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Date Posted: 2026-09-04