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Senior Signal and Power Integrity Engineer — SI/PI, Satellites (Starlink)

SpaceX
July 29, 2026
Full-time
On-site
Palo Alto, California, United States
$115,000 - $185,000 USD yearly
Test Engineering Jobs, Level - Senior

Job Title

Senior Signal and Power Integrity Engineer — SI/PI, Satellites (Starlink)

Role Summary

Lead SI/PI design, analysis, verification, and production signoff for Starlink satellite payload hardware across the full product life cycle. Work at the intersection of electrical, mechanical, thermal, RF/antenna, packaging, and software engineering to define architectures, troubleshoot hardware, and establish SI/PI processes.

This role is cross-functional and requires defining best practices, simulation workflows, test methodologies, and lab needs for high-speed digital channels and complex power delivery networks.

Experience Level

Senior. Hiring guidance: typically 5+ years industry experience in circuit or hardware design with multi-disciplinary system-level SI/PI responsibility.

Responsibilities

Primary duties include technical ownership of SI and PI for satellite payload hardware from architecture through production.

  • Specify, design, simulate, verify, qualify, and troubleshoot SI and PI for high-speed wireline and optoelectronic links, memory interfaces, and ASIC/FPGA power delivery networks.
  • Define PCB material, stackup, and channel component specifications; optimize transitions from die bump to die bump across package and PCB.
  • Collaborate with RF, antenna, ASIC, packaging, mechanical, thermal, software, supply chain, and production teams to architect robust channels and PDNs.
  • Drive root-cause analysis and fixes for PCB manufacturing, PCBA testing, and satellite integration issues.
  • Establish simulation workflows, lab test methodologies, signoff criteria, and required test equipment for SI/PI verification.

Requirements

Minimum technical qualifications and job constraints.

  • 5+ years industry experience designing circuits, electronic products, or hardware (full product life-cycle preferred).
  • 2+ years experience using 3D EM and high-speed channel simulation tools (e.g., CST, HFSS, ADS) and channel/PDN simulation workflows.
  • 2+ years research or industry experience with high-speed digital design or power integrity.
  • Experience with high-speed SERDES, high-bandwidth memory interfaces, or PDN architecture is strongly preferred.
  • Strong scripting/programming skills (Python, C/C++ recommended) for automation and analysis.
  • Experience with PCB materials, high-volume PCB manufacturing, connectors, and EMI/EMC debugging is desirable.
  • Ability to work extended hours or weekends for mission-critical deadlines; occasional travel may be required.
  • Must meet ITAR eligibility requirements: U.S. citizen, U.S. lawful permanent resident, refugee, asylee, or be eligible to obtain required U.S. Department of State authorizations.

Education Requirements

Minimum: Bachelor’s degree in Electrical Engineering, Computer Engineering, or Physics. Preferred: Master’s degree or PhD in Electrical or Computer Engineering with emphasis in electromagnetic theory, transmission line theory, wireline transceivers, or power integrity. Relevant advanced degrees and specialized coursework/certifications in high-speed digital design, electromagnetics, or power integrity are a plus.


About the Company

Company: SpaceX

Headquarters: Hawthorne, California, United States

SpaceX is focused on developing space technologies to enable human exploration of Mars and beyond. The company is known for its advancements in rocketry and its Starlink satellite constellation, which delivers high-speed internet globally.

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Date Posted: 2026-07-23