Senior SI/PI Engineer — Serdes, Satellites (Starlink)

Job Title

Senior SI/PI Engineer — Serdes, Satellites (Starlink)

Role Summary

As a Signal and Power Integrity (SI/PI) engineer on Starlink's Payload Engineering team you will own SI/PI across the hardware lifecycle for satellite payloads. Work covers silicon/package evaluation, PCB stackup and channel architecture, PDN design, lab characterization, and production qualification.

This is a cross-functional role requiring collaboration with RF, antenna, ASIC, packaging, mechanical, thermal, software, supply chain, and production teams to deliver high-speed communication and memory interfaces for satellites.

Experience Level

Senior level — basic qualifications indicate 5+ years of industry experience with hardware design and at least 2+ years using 3D EM/high-speed channel simulation tools.

Responsibilities

Primary responsibilities focus on end-to-end SI and PI for satellite hardware.

• Specify, design, simulate, verify, and qualify SI and PI for high-speed SERDES, optoelectronics, and memory interfaces.
• Architect PDNs for ASICs, FPGAs, and processors; select components and define production screens and tests.
• Derive PCB material and channel specifications; design and optimize transitions from die bump to die bump.
• Lead troubleshooting, characterization, and root-cause analysis in lab, PCB manufacturing, PCBA test, and satellite integration.
• Define simulation workflows, test methodologies, sign-off criteria, and lab equipment needs for SI/PI signoff.
• Collaborate across disciplines to architect new products with novel channels, interfaces, and power delivery strategies.

Requirements

Must-have and preferred technical qualifications; formal education is summarized in the Education Requirements section below.

• Must-have: 5+ years industry experience designing circuits, electronic products, or hardware.
• 2+ years experience using 3D EM or high-speed digital channel simulation tools (e.g., CST, HFSS, ADS).
• 2+ years research or industry experience with high-speed digital design or power integrity.
• Proven ability to define SI/PI workflows, simulation practices, and test methodologies for signoff.
• ITAR eligibility: U.S. citizen, lawful permanent resident, refugee, asylee, or eligible for required State Department authorizations. See U.S. Department of State for more information.
• Ability to work extended hours or weekends as needed; occasional travel may be required.
• Nice-to-have: Experience architecting and debugging multi-10Gbps to 224Gbps SERDES across package and PCB, high-bandwidth memory interfaces (DDR4/LPDDR5/GPDDR6, QSPI, eMMC), PDN design for large processors/ASICs, Python/C/C++ skills, EMI/EMC debugging, and experience with low-loss laminates and high-volume PCB manufacturing.

Education Requirements

Required: Bachelor’s degree in Electrical Engineering, Computer Engineering, or Physics. Preferred: Master’s degree or PhD in Electrical or Computer Engineering with emphasis in electromagnetic theory, transmission line theory, wireline transceivers, or power integrity.

About the Company

Company: SpaceX

Headquarters: Hawthorne, California, United States

SpaceX is focused on developing space technologies to enable human exploration of Mars and beyond. The company is known for its advancements in rocketry and its Starlink satellite constellation, which delivers high-speed internet globally.